Method and apparatus with multi-bit accumulation
AssigneeSamsung Electronics Co., Ltd.
InventorsDong-Jin CHANG, Sungmeen MYUNG, Jaehyuk LEE, Daekun YOON, Seok Ju YUN
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Abstract
A multi-bit accumulator including a plurality of 1-bit Wallace trees configured to perform an add operation on single-bit input data, a plurality of tristate buffers configured to output a result of the add operation of the 1-bit Wallace trees, according to an enable signal, and a shift-adder configured to perform an accumulation operation on the result of the add operation of the plurality of 1-bit Wallace trees by a shift operation based on a clock signal.
Claims20
An apparatus, the apparatus comprising:
- a multi-bit accumulator, including:
- a plurality of 1-bit Wallace trees each configured to perform an add operation on single-bit input data;
- a plurality of tristate buffers configured to output a result of the add operation of the plurality of 1-bit Wallace trees, according to an enable signal;
- and
- a shift-adder configured to perform an accumulation operation on the result of the add operation of the plurality of 1-bit Wallace trees by a shift operation based on a clock signal.
An apparatus, the apparatus comprising:
- an in memory computing (IMC) processor, including:
- an IMC device comprising a plurality of IMC macros comprising a plurality of columns in a cross bar structure;
- an input controller configured to sequentially input multi-bit first values to the IMC device bit by bit;
- and
- a post operation circuit configured to output a multi-bit operation result that integrates operation results of the plurality of IMC macros,
- wherein each of the IMC macros comprises:
- a memory array comprising a plurality of bit cells, each bit cell of the plurality of bit cells being configured to store a second value applied to each of the multi-bit first values;
- a binary gate array comprising operation a plurality of gates, each gate of the plurality of gates being configured to perform a single-bit multiplication and accumulation (MAC) operation between the multi-bit first values and the second value;
- and
- a multi-bit accumulator configured to perform a bit-wise operation on results of the single-bit MAC operation and to perform an accumulation operation on a result of the bit-wise operation corresponding to any one of the plurality of columns, through a shift operation based on a clock signal.
A method, the method comprising:
- receiving input data, the input data comprising single-bit data;
- performing an add operation of 1-bit units on the input data;
- outputting a result of the add operation of the 1-bit units, based on an enable signal;
- and
- outputting a multi-bit operation result corresponding to the input data by shifting and accumulating a result of the add operation of the 1-bit units.
Dependencies are inferred from the claim text.