Controller to detect malfunctioning address of memory device
AssigneeRambus Inc.
InventorsAdrian E. Ong, Fan Ho
Life of this patent
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AssigneeRambus Inc.
InventorsAdrian E. Ong, Fan Ho
Estimating the term…
A dynamic random access memory (DRAM) comprises a plurality of primary data storage elements, a plurality of redundant data storage elements, and circuitry to receive a first register setting command and initiate a repair mode in the DRAM in response to the first register setting command. The circuitry is further to receive an activation command, repair a malfunctioning row address in the DRAM, receive a precharge command, receive a second register setting command, terminate the repair mode in the DRAM in response to the second register setting command, receive a memory access request for data stored at the malfunctioning row address, and redirect the memory access request to a corresponding row address in the plurality of redundant data storage elements.
(canceled)
A method of operating a memory controller comprising a non-volatile memory component, the method comprising:
A memory controller comprising:
A system comprising:
Dependencies are inferred from the claim text.