Semiconductor package

A semiconductor package comprising:

• a package substrate including an edge region and a central region excluding the edge region, wherein the package substrate includes a first surface and a second surface that are opposed to each other;
• a semiconductor chip mounted on the central region of the package substrate;
• a first sub-redistribution pattern disposed at the central region of the package substrate;
• a second sub-redistribution pattern disposed at the edge region of the package substrate and including a trench;
• a first sub-pad disposed on the second surface of the package substrate and connected to the first sub-redistribution pattern;
• a second sub-pad disposed on the second surface of the package substrate and connected to the second sub-redistribution pattern;
• a first sub-solder ball connected to the first sub-pad;
• and
• a second sub-solder ball connected to the second sub-pad,
• wherein the second sub-pad extends along a sidewall and a bottom surface of the trench,
• wherein at least a part of the second sub-solder ball is disposed on second sub-pad in the trench,
• wherein the at least a part of the second sub-solder ball overlaps the second sub-redistribution pattern in a direction that is perpendicular to a thickness direction of the package substrate, and
• wherein an upper surface of the first sub-pad is flat.

A semiconductor package comprising:

• a package substrate including four edge regions and a central region excluding the edge regions, wherein the package substrate includes a first surface and a second surface that are opposed to each other, wherein each of the four edge regions having a step shape;
• at least one semiconductor chip mounted on the first surface of the central region of the package substrate;
• a solder resist layer disposed on the second surface and including a first trench;
• a redistribution pattern including a first sub-redistribution pattern and a second sub-redistribution pattern, wherein the first sub-redistribution pattern is disposed at the central region of the package substrate, and the second sub-redistribution pattern is disposed at the edge region of the package substrate and includes a plurality of second trenches;
• a first sub-pad extending along a bottom surface of the first trench and being connected to the first sub-redistribution pattern;
• a second sub-pad extending along the bottom surface of the first trench and a sidewall and a bottom surface of the second trench and being connected to the second sub-redistribution pattern;
• a first sub-solder ball connected to the first sub-pad;
• and
• a second sub-solder ball connected to the second sub-pad,
• wherein the first trench exposes the redistribution pattern,
• wherein the plurality of second trenches do not expose the package substrate,
• wherein the second sub-solder ball includes a first portion and a second portion, wherein the first portion fills the second trenches, and the second portion is disposed on the first portion,
• wherein the first portion of the second sub-solder ball does not overlap the first sub-solder ball in a direction that is perpendicular to a thickness direction of the package substrate, and
• wherein each of the first sub-pad and the second sub-pad includes NiAu.