Non-volatile memory with suspension period during programming
AssigneeSanDisk Technologies LLC
InventorsYi Song, Jiacen Guo, Jiahui Yuan
Life of this patent
Estimating the term…
Abstract
To remedy short term data retention issues, a system creates a gate to channel voltage differential for non-volatile memory cells between programming and verifying in order to accelerate the effects of the short term data retention issue. That is, the gate to channel voltage differential will accelerate the migrating of electrons out of shallow traps. In some embodiments, the gate to channel voltage differential comprises a higher voltage at the channel in comparison to the gate. In some embodiments, the programming comprises applying doses of a programming signal and the gate to channel voltage differential is only created for a subset of the time periods between doses of the programming signal.
Claims20
A non-volatile storage apparatus, comprising:
- a non-volatile memory cell with a charge trapping region;
- and
- a control circuit connected to the non-volatile memory cell, the control circuit is configured to:
- apply programming to the memory cell;
- verify whether the memory cell has successfully reached a target data state from the programming;
- and
- accelerate migrating of electrons out of shallow traps in the charge trapping region during a period of time between the programming and the verifying.
A method, comprising:
- applying programming to a memory cell, the memory cell includes a gate and a channel;
- verifying whether the memory cell has successfully reached a target data state from the programming;
- and
- creating a gate to channel voltage differential for the memory cell during a period of time between the applying programming and the verifying, the gate to channel voltage differential comprises a higher voltage at the channel in comparison to the gate.
A non-volatile storage apparatus, comprising:
- a plurality of non-volatile memory cells;
- and
- a control circuit connected to the non-volatile memory cells, the control circuit is configured to:
- apply doses of a programming signal to the non-volatile memory cells;
- during time periods between doses of the programming signal, verify whether the non-volatile memory cells have successfully reached their target data state in response to the doses of the programming;
- and
- during only a subset of the time periods between doses of the programming signal, insert a suspension interval that delays performing the verifying of whether the non-volatile memory cells have successfully reached their target data state.
Dependencies are inferred from the claim text.