A spatial light modulator
AssigneeAgency for Science, Technology and Research
InventorsDi ZHU, Kevin Tshun Chuan CHAI, Aarthy MANI, Anh Tuan DO
Life of this patent
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Abstract
This document describes a spatial light modulator that comprises a pixel array having a plurality of pixels whereby each pixel in this array is communicatively coupled to a digital pixel circuit which are in turn all coupled to a bit-plane control circuit. The bit-plane control circuit is configured to generate, using a Pulse Code Modulation (PCM) algorithm, bit-plane signals that are used to control the sample and hold functions performed by each of the digital pixel circuits so that the pixel array may carry out its scanning function accurately and in a power efficient manner.
Claims16
A spatial light modulator comprising:
- a pixel array having a plurality of pixels whereby each pixel is communicatively connected to a digital pixel circuit whereby each digital pixel circuit comprises:
- a Static Random Access Memory (SRAM) circuit configured to receive column data signals and a clock row enable signal, ck_row, whereby the SRAM circuit is triggered by the clock row enable signal, ck_row, to sample the received column data signals;
- a hold buffer circuit coupled to an output of the SRAM circuit, the hold buffer circuit configured to receive a clock hold signal, ck_hold, whereby the hold buffer circuit is triggered by the clock hold signal, ck_hold, to receive and store the sampled signal from the output of the SRAM circuit.
A method for modulating spatial light using a spatial light modulator that has a pixel array which comprises a plurality of pixels whereby each pixel is communicatively connected to a digital pixel circuit, the method comprising
- receiving, using a Static Random Access Memory (SRAM) circuit provided within each digital pixel circuit, column data signals and a clock row enable signal, ck_row, whereby the SRAM circuit is triggered by the clock row enable signal, ck_row, to sample the received column data signals;
- receiving, using a hold buffer circuit coupled to an output of the SRAM circuit, a clock hold signal, ck_hold, whereby the hold buffer circuit is triggered by the clock hold signal, ck_hold, to receive and store the sampled signal from the output of the SRAM circuit.
Dependencies are inferred from the claim text.