Transistor, fabrication method, and memory

Abstract

The present disclosure is applicable to the field of semiconductors, and provides a transistor, a fabrication method, and a memory. The transistor includes: a semiconductor substrate, silicon support pillars, located on the semiconductor substrate, and gates, each of the gates arranged around one of the silicon support pillars. A side surface of each of the gates close to the silicon support pillar is a first surface, a side surface of each of the gates distant from the silicon support pillar is a second surface, and the length of the first surface is less than the length of the second surface. The length of the first surface of each of the gates is less than the length of the channel region of each of the silicon support pillars.

Dependencies are inferred from the claim text.