Voltage amplifier based on cascaded charge pump boosting
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChin-Ho Chang, Jaw-Juinn Horng, Yung-Chow Peng
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Abstract
Disclosed herein are related to a system and a method of amplifying an input voltage based on cascaded charge pump boosting. In one aspect, first electrical charges are stored at a first capacitor according to the input voltage to obtain a second voltage. In one aspect, the second voltage is amplified according to the first electrical charges stored by the first capacitor to obtain a third voltage. In one aspect, second electrical charges are stored at the second capacitor according to the third voltage. In one aspect, the third voltage is amplified according to the second electrical charges stored by the second capacitor to obtain a fourth voltage.
Claims20
A circuit, comprising:
- a first capacitor including a first electrode and a second electrode;
- a second capacitor including a third electrode and a fourth electrode;
- a differential amplifier including a first input port, a second input port, and an output port, wherein the second input port is coupled to the output port of the differential amplifier;
- a first set of switches coupled between the first electrode of the first capacitor and each of the output port of the differential amplifier and a reference metal rail, respectively;
- a second set of switches coupled between the second electrode of the first capacitor and each of the output port of the differential amplifier and the first input port of the differential amplifier, respectively;
- a third set of switches coupled between the third electrode of the second capacitor and each of the output port of the differential amplifier and the reference metal rail, respectively;
- and
- a fourth set of switches coupled between the fourth electrode of the second capacitor and each of the output port of the differential amplifier and an input port of a device, respectively.
A circuit, comprising:
- a first capacitor including a first electrode and a second electrode;
- a second capacitor including a third electrode and a fourth electrode;
- and
- a differential amplifier including a first input port, a second input port, and an output port, wherein the second input port is coupled to the output port of the differential amplifier;
- wherein the first electrode of the first capacitor is selectively coupled to the output port of the differential amplifier or a reference metal rail;
- wherein the second electrode of the first capacitor is selectively coupled to the output port of the differential amplifier or the first input port of the differential amplifier;
- wherein the third electrode of the second capacitor is selectively coupled to the output port of the differential amplifier or the reference metal rail;
- and
- wherein the fourth electrode of the second capacitor is selectively coupled to the output port of the differential amplifier or an input port of a device.
A circuit, comprising:
- a first capacitor including a first electrode and a second electrode;
- a second capacitor including a third electrode and a fourth electrode;
- and
- a unity gain buffer including a first input port, a second input port, and an output port, wherein the second input port is coupled to the output port of the unity gain buffer;
- wherein the first electrode of the first capacitor is selectively coupled to the output port of the unity gain buffer or a reference metal rail;
- wherein the second electrode of the first capacitor is selectively coupled to the output port of the unity gain buffer or the first input port of the unity gain buffer;
- wherein the third electrode of the second capacitor is selectively coupled to the output port of the unity gain buffer or the reference metal rail;
- and
- wherein the fourth electrode of the second capacitor is selectively coupled to the output port of the unity gain buffer or an input port of a successive-approximation register (SAR) analog to digital converter (ADC).
Dependencies are inferred from the claim text.