Semiconductor device
AssigneeDenso Corporation
InventorsYusuke HAYAMA, Yusuke YAMASHITA, Keita KATAOKA, Yukihiko WATANABE
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Abstract
A semiconductor device includes a first main electrode, a second main electrode, and a semiconductor layer. The semiconductor layer includes a p-type semiconductor region disposed at a position exposed from the upper surface of the semiconductor layer and electrically connected to the second main electrode, and an n-type semiconductor region in contact with the p-type semiconductor region and separated from the second main electrode by the p-type semiconductor region. The n-type semiconductor region has a trap region provided at a position in contact with the p-type semiconductor region, and a hole trap is formed in the trap region.
Claims11
A semiconductor device comprising:
- a first main electrode;
- a second main electrode;
- and
- a semiconductor layer having a lower surface covered with the first main electrode and an upper surface covered with the second main electrode, wherein the semiconductor layer includes
- a p-type semiconductor region disposed at a position exposed from the upper surface and electrically connected to the second main electrode, and
- an n-type semiconductor region in contact with the p-type semiconductor region and separated from the second main electrode by the p-type semiconductor region,
- the n-type semiconductor region has a trap region at a position in contact with the p-type semiconductor region,
- a hole trap is formed in the trap region,
- an energy level of the hole trap of the trap region is represented by Et,
- an energy level of a valence band of the trap region is represented by Ev,
- a band gap of the trap region is represented by Eg, and
- a relationship of Et−Ev<Eg/2 is established.
A semiconductor device comprising:
- a first main electrode;
- a second main electrode;
- and
- a semiconductor layer having a lower surface covered with the first main electrode and an upper surface covered with the second main electrode, wherein
- the semiconductor layer includes
- a p-type semiconductor region disposed at a position exposed from the upper surface and electrically connected to the second main electrode, and
- an n-type semiconductor region in contact with the p-type semiconductor region and separated from the second main electrode by the p-type semiconductor region,
- the n-type semiconductor region has a trap region provided at a position in contact with the p-type semiconductor region,
- a hole trap is formed in the trap region,
- the semiconductor layer is silicon carbide, and
- the trap region contains aluminum.
A semiconductor device comprising:
- a first main electrode;
- a second main electrode;
- and
- a semiconductor layer having a lower surface covered with the first main electrode and an upper surface covered with the second main electrode, wherein
- the semiconductor layer includes
- a p-type semiconductor region disposed at a position exposed from the upper surface and electrically connected to the second main electrode, and
- an n-type semiconductor region in contact with the p-type semiconductor region and separated from the second main electrode by the p-type semiconductor region,
- the n-type semiconductor region has a trap region provided at a position in contact with the p-type semiconductor region,
- a hole trap is formed in the trap region,
- the semiconductor device further comprising a trench gate portion provided in a trench extending from the upper surface of the semiconductor layer through the p-type semiconductor region to reach the n-type semiconductor region, and
- the trap region is disposed at a position away from a side surface of the trench gate portion.
Dependencies are inferred from the claim text.