Semiconductor device and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsLi-Zhen Yu, Huan-Chieh Su, Lin-Yu Huang, Chih-Hao Wang
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Abstract
A semiconductor device includes a plurality of stacks that each includes a plurality of nanostructures stacked over each other, a gate structure wrapping around the nanostructures and extending between the stacks, source and drain structures, and a plurality of fin structures respectively disposed on the stacks. A first surface of the gate structure between the stacks is substantially coplanar with first surfaces of the fin structures facing to the nanostructures or between the first surfaces of the fin structures and the nanostructures.
Claims20
A semiconductor device, comprising:
- a plurality of stacks, each stack comprising a plurality of nanostructures stacked over each other;
- a gate structure, wrapping around the nanostructures and extending between the stacks, wherein the gate structure has a first surface and a second surface opposite to the first surface;
- source and drain structures;
- and
- a plurality of fin structures, disposed on the stacks respectively, wherein a first surface of the gate structure between the stacks is substantially coplanar with first surfaces of the fin structures facing to the nanostructures or between the first surfaces of the fin structures and the nanostructures.
A semiconductor device, comprising:
- a plurality of semiconductor fins, having first surfaces and second surfaces opposite to the first surfaces;
- nanostructure channels below the semiconductor fins;
- a gate dielectric layer, wrapping around the nanostructure channels;
- a gate layer, surrounding the gate dielectric layer and the nanostructure channels;
- source and drain structures;
- and
- a dielectric structure different from the gate dielectric layer, disposed between the semiconductor fins, wherein a first surface of the dielectric structure is substantially coplanar with or lower than the first surfaces of the semiconductor fins.
A method of forming a semiconductor device, comprising:
- forming a plurality of nanostructures over a substrate;
- forming a plurality of isolation regions in the substrate between the nanostructures;
- forming a plurality of source and drain structures aside the nanostructures;
- forming a plurality of gate structures surrounding the nanostructures;
- turning over the substrate;
- removing the isolation regions to form a plurality of trenches;
- removing portions of the gate structures exposed by the trenches to form a plurality of recesses, such that recessed surfaces of the gate structures are substantially coplanar with or lower than a surface of the substrate facing to the nanostructures;
- and
- forming dielectric structures to fill up the trenches and the recesses.
Dependencies are inferred from the claim text.