Integrated circuit structures having memory with backside power delivery
AssigneeIntel Corporation
InventorsAbhishek Anil SHARMA, Wilfred GOMES
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Abstract
Structures having memory with backside power delivery are described. In an example, an integrated circuit structure includes a front-side structure including a device layer having a plurality of nanowire-based transistors, and a plurality of metallization layers above the nanowire-based transistors of the device layer. One of the metal layers includes an array of uninterrupted signal lines. A backside structure is below the nanowire-based transistors of the device layer. The backside structure includes a ground metal line.
Claims20
An integrated circuit structure, comprising:
- a front-side structure comprising:
- a device layer having a plurality of nanowire-based transistors;
- and
- a plurality of metallization layers above the nanowire-based transistors of the device layer, wherein one of the metal layers includes an array of uninterrupted signal lines;
- and
- a backside structure below the nanowire-based transistors of the device layer, the backside structure including a ground metal line.
An integrated circuit structure, comprising:
- a front-side structure comprising:
- a device layer having a plurality of fin-based transistors;
- and
- a plurality of metallization layers above the fin-based transistors of the device layer, wherein one of the metal layers includes an array of uninterrupted signal lines;
- and
- a backside structure below the fin-based transistors of the device layer, the backside structure including a ground metal line.
A computing device, comprising:
- a board;
- and
- a component coupled to the board, the component including an integrated circuit structure, comprising:
- a front-side structure comprising:
- a device layer having a plurality of nanowire-based transistors;
- and
- a plurality of metallization layers above the nanowire-based transistors of the device layer, wherein one of the metal layers includes an array of uninterrupted signal lines;
- and
- a backside structure below the nanowire-based transistors of the device layer, the backside structure including a ground metal line.
A computing device, comprising:
- a board;
- and
- a component coupled to the board, the component including an integrated circuit structure, comprising:
- a front-side structure comprising:
- a device layer having a plurality of fin-based transistors;
- and
- a plurality of metallization layers above the fin-based transistors of the device layer, wherein one of the metal layers includes an array of uninterrupted signal lines;
- and
- a backside structure below the fin-based transistors of the device layer, the backside structure including a ground metal line.
Dependencies are inferred from the claim text.