Microelectronic die with two dimensional (2d) complementary metal oxide semiconductor devices in an interconnect stack thereof

A semiconductor package, comprising:

• a package substrate;
• a die on the package substrate and electrically coupled thereto, the die including:
• a substrate;
• a first structure on the substrate, the first structure corresponding to a front end of line (FEOL) stack of the die and including a plurality of first transistors therein;
• and
• a second structure on the substrate, the second structure corresponding to a back end of line (BEOL) stack of the die, and including a plurality of second transistors therein, the plurality of second transistors including a transition metal dichalcogenide (TMD) material.

An integrated circuit (IC) device assembly including:

• a printed circuit board;
• a package substrate on the printed circuit board and electrically coupled thereto;
• and
• a die on the package substrate and electrically coupled thereto, the die including:
• a substrate;
• a first structure on the substrate, the first structure corresponding to a front end of line (FEOL) stack of the die and including a plurality of first transistors therein;
• and
• a second structure on the substrate, the second structure corresponding to a back end of line (BEOL) stack of the die, and including a plurality of second transistors therein, the plurality of second transistors including a transition metal dichalcogenide (TMD) material.

A method to fabricate a microelectronic device including:

• providing a substrate;
• providing a first structure on the substrate, the first structure corresponding to a front end of line (FEOL) stack of the device and including a plurality of first transistors therein;
• and
• providing a second structure on the substrate, the second structure corresponding to a back end of line (BEOL) stack of the device, and including a plurality of second transistors therein, the plurality of second transistors including a transition metal dichalcogenide (TMD) material.