Semiconductor packages and methods of forming the same

A semiconductor package, comprising:

• a first package including a first semiconductor chip, a package substrate including a first pad electrically connected to the first semiconductor chip and on which the first semiconductor chip is mounted, and a first encapsulant on a portion of the first semiconductor chip;
• a second encapsulant on a portion of the first package;
• a first redistribution structure including a first redistribution via connected to the first pad, and disposed on a lower surface of the first package;
• a second semiconductor chip disposed on a lower surface of the first redistribution structure, the second semiconductor chip having an upper surface facing the first redistribution structure and a lower surface on which a connection pad is disposed;
• and
• a second redistribution structure including a second redistribution via electrically connected to the connection pad of the second semiconductor chip, and disposed on the lower surface of the second semiconductor chip,
• wherein the first and second redistribution vias have respective inclined side surfaces and become narrower in width toward the first package.

A method for manufacturing a semiconductor package, comprising:

• providing a first package including a first semiconductor chip, a package substrate including a first pad electrically connected to the first semiconductor chip and on which the first semiconductor chip is mounted, and a first encapsulant on the first semiconductor chip, wherein a front surface of the first package comprises the first encapsulant and a rear surface of the first package is positioned opposite to the front surface;
• attaching the front surface of the first package to a carrier substrate;
• forming a second encapsulant on the first package;
• forming a first redistribution structure including a first redistribution via connected to the first pad on the first package and the second encapsulant;
• forming a vertical connection structure connected to the first redistribution via on the first redistribution structure;
• mounting a second semiconductor chip on the first redistribution structure, wherein the second semiconductor chip includes a connection pad on an upper surface of the second semiconductor chip;
• forming a third encapsulant on the vertical connection structure and the second semiconductor chip;
• forming a second redistribution structure on the third encapsulant, wherein the second redistribution structure includes a second redistribution via connected to the vertical connection structure and the connection pad;
• and
• forming a connection portion on the second redistribution structure.