Memory system

A memory system comprising:

• a nonvolatile memory including a plurality of memory cells;
• and
• a memory controller, wherein
• each of the plurality of memory cells is configured to store a first bit and a second bit, and
• the memory controller is configured to:
• read first data by using a first voltage to a first read process that reads data corresponding to the first bit from the memory cells;
• read second data by using a second voltage to a second read process that reads data corresponding to the second bit from the memory cells;
• in a case where an error correction process of the first data is successful,
• determine a third voltage, based on the first data and third data that is obtained by error-correcting the first data;
• and
• update a first read voltage that is used to the first read process, from the first voltage to the third voltage.