Nonvolatile memory device and method of controlling read operation of the same

A method of controlling a read operation of a nonvolatile memory device, comprising:

• controlling a bitline current to flow from a power supply voltage to a bitline by electrically connecting the bitline to the power supply voltage during a precharge period of the read operation;
• controlling a first portion of the bitline current, as a cell current, to flow through a cell string connected between the bitline and a source line during the precharge period;
• controlling a second portion of the bitline current, as a control current, to flow through a current control switch circuit connected between the bitline and a sink node during the precharge period;
• electrically connecting the bitline to a sensing node during a develop period after the precharge period;
• and
• sensing data stored in a selected memory cell of the cell string using a sense amplifier connected to the sensing node during a sensing period after the develop period.

A nonvolatile memory device comprising:

• a plurality of bitlines;
• a plurality of precharge transistors configured to electrically connect the plurality of bitlines to a power supply voltage during a precharge period of a read operation to transmit a plurality of bitline currents respectively flowing from the power supply voltage to the plurality of bitlines;
• a plurality of cell strings respectively connected between the plurality of bitlines and a source line, the plurality of cell strings respectively comprising a plurality of memory cells and being configured to respectively transmit, respectively, first portions of the plurality of bitline currents as a plurality of cell currents;
• and
• a plurality of current control switch circuits respectively connected between the plurality of bitlines and a sink node, the plurality of current control switch circuits being configured to respectively transmit, respectively, second portions of the plurality of bitline currents, as a plurality of control currents flowing from the plurality of bitlines to the sink node during the precharge period.