System for determining target locking time of delay locked loop of memory apparatus

A system for determining an target locking time for a delay locked loop (DLL) of a memory apparatus, the system comprising:

• a signal generating device configured to provide a first set of input signals to the memory apparatus in accordance with a first set of first operational parameters and a set of second operational parameters;
• a measuring device configured to measure a first set of output signals from the memory apparatus in response to the first set of input signals, and to determine whether the delay locked loop fails at any combination of the first set of first operational parameters and the set of second operational parameters;
• and
• a display device that comprises a first two-dimensional plot region comprising a first plurality of plot units each corresponding to one combination of the first set of first operational parameters and the set of second operational parameters,
• wherein a plot unit of the first plurality of plot units shows a first color when the delay locked loop does not fail under the corresponding combination of the plot unit, and wherein the plot unit of the plurality of plot units shows a second color when the delay locked loop fails under the corresponding combination of the plot unit.