Method of storing data in memories

A method comprising:

• reading a characterization bit of a data stored in bit cells, each bit cell having a first state and a second state, wherein reading the bit cell with the first state consumes less energy than reading the bit cell with the second state or wherein the bit cell with the first state has less retention errors than the bit cell with the second state;
• reading a stored bit in a bit cell through a sense amplifier and through either a first read path or a second read path selected based on the characterization bit;
• wherein the sense amplifier is configured to generate a sensed bit from the stored bit, the first read path is configured to generate a first output bit from the sensed bit when the first read path is selected, and the second read path is configured to generate a second output bit from the sensed bit when the second read path is selected;
• and
• wherein the first output bit generated from the sensed bit in response to the first read path being selected is configured to be a bitwise complement of the second output bit generated from the sensed bit in response to the second read path being selected.

An integrated circuit comprising:

• a memory storage having bit cells, wherein a bit cell has a first state and a second state, wherein either the memory storage is configured to cause the bit cell with the first state being read out with less energy than the bit cell with the second state or configured to cause the bit cell with the first state having less retention errors than the bit cell with the second state;
• a write path switch configured to have a connection state determined by a characterization bit;
• a write terminal configured to receive a data of a data set;
• a write driver having an input configured to receive an input data from the write terminal through either a first write path or a second write path as determined by the connection state of the write path switch, wherein the write driver is operative to write an input bit of the input data into the bit cell as a stored bit;
• and
• wherein the input data received through the first write path is configured to be equal to the data at the write terminal, and the input data received through the second write path is configured to be a bitwise complement of the data at the write terminal.