Pixel drive circuit, display panel, and display device

A display panel, comprising:

• a plurality of pixels, each pixel comprising a plurality of sub-pixel elements;
• and
• a plurality of pixel drive circuits, wherein the plurality of sub-pixel elements is coupled to the plurality of the pixel drive circuits in a one-to-one correspondence, and each pixel drive circuit comprising:
• a drive circuitry, comprising:
• a drive transistor, an input end of the drive transistor is coupled to a drive-voltage terminal, an output end of the drive transistor is coupled to one of the plurality of sub-pixel elements;
• and
• a storage capacitor, one end of the storage capacitor is coupled to a control end of the drive transistor, the other end of the storage capacitor is coupled to the output end of the drive transistor;
• a data-writing circuitry, an output end of the data-writing circuitry is coupled to the output end of the drive circuitry, wherein the data-writing circuitry is configured to write a data voltage to the control end of the drive transistor in a writing phase;
• a first voltage-stabilization circuitry, coupled between a set-voltage terminal and the control end of the drive transistor, wherein the first voltage-stabilization circuitry is configured, in response to a gate-control level output from a first gate-control-signal line, to maintain a potential at the control end of the drive transistor at a set voltage in a non-light-emitting phase;
• and
• a second voltage-stabilization circuitry, coupled between the first voltage-stabilization circuitry and the control end of the drive transistor, and connected in series with the first voltage-stabilization circuitry, wherein the second voltage-stabilization circuitry is configured to assist in maintaining the potential at the control end of the drive transistor during a transition from a compensation-and-writing phase to a light-emitting phase, and in the light-emitting phase.

A display device, comprising:

• a display panel, comprising:
• a plurality of pixels, each pixel comprising a plurality of sub-pixel elements;
• and
• a plurality of pixel drive circuits, wherein the plurality of sub-pixel elements is coupled to the plurality of the pixel drive circuits in a one-to-one correspondence, and each pixel drive circuit comprising:
• a drive circuitry, comprising:
• a drive transistor, an input end of the drive transistor is coupled to a drive-voltage terminal, an output end of the drive transistor is coupled to one of the plurality of sub-pixel elements;
• and
• a storage capacitor, one end of the storage capacitor is coupled to a control end of the drive transistor, the other end of the storage capacitor is coupled to the output end of the drive transistor;
• a data-writing circuitry, an output end of the data-writing circuitry is coupled to the output end of the drive circuitry, wherein the data-writing circuitry is configured to write a data voltage to the control end of the drive transistor in a writing phase;
• a first voltage-stabilization circuitry, coupled between a set-voltage terminal and the control end of the drive transistor, wherein the first voltage-stabilization circuitry is configured, in response to a gate-control level output from a first gate-control-signal line, to maintain a potential at the control end of the drive transistor at a set voltage in a non-light-emitting phase;
• and
• a second voltage-stabilization circuitry, coupled between the first voltage-stabilization circuitry and the control end of the drive transistor, and connected in series with the first voltage-stabilization circuitry, wherein the second voltage-stabilization circuitry is configured to assist in maintaining the potential at the control end of the drive transistor during a transition from a compensation-and-writing phase to a light-emitting phase, and in the light-emitting phase.