Controlling Memory Frequency Based on Transaction Queue Occupancy
AssigneeGoogle Inc.
InventorsDerek James Basehore, Sonny Rao
Life of this patent
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Abstract
Techniques and apparatuses are described that use transaction queue lengths to alter a clock frequency that controls access to a memory of an electronic device. Techniques include detecting that a transaction queue threshold has been violated, initiating a counter to measure a time duration, determining that the transaction queue threshold continues to be violated for the time duration and, in response, altering the clock frequency that controls access to the memory of the electronic device.
Claims22
A method performed by a memory controller, the method comprising:
- detecting that a transaction queue threshold is violated, the transaction queue threshold corresponding to an occupied portion of a length of a transaction queue for accessing a memory;
- in response to detecting that the transaction threshold queue is violated, initiating a counter to measure a time duration, the counter based on a clock frequency controlling a rate of accessing the memory;
- determining that the transaction queue threshold continues to be violated for the time duration;
- and
- in response to determining that the transaction threshold queue continues to be violated for the time duration, altering the clock frequency controlling the rate of accessing the memory.
7-9. (canceled)
A method performed by an electronic device, the method comprising:
- determining, by a first memory controller of a first memory of the electronic device, that a transaction queue threshold is violated for a time duration, the transaction queue threshold corresponding to an occupied portion of a length of a transaction queue for accessing a second memory of the electronic device;
- and
- in response to the determining, transmitting, by the first memory controller to a second memory controller of the electronic device, a message, the message including an instruction that directs the second memory controller to alter a clock frequency to change a rate of accessing the second memory.
(canceled)
(canceled)
A computing system comprising:
- a memory with a transaction queue configured to store requests for accessing the memory;
- a clock configured to generate a clock signal having a clock frequency that controls a rate of accessing the memory;
- a counter;
- and
- a memory controller configured to:
- detect that a transaction queue threshold is violated, the transaction queue threshold corresponding to an occupied portion of a length of the transaction queue for accessing the memory;
- in response to detecting that the transaction threshold queue is violated, initiating the counter to measure a time duration, the counter based on the clock frequency that controls the rate of accessing the memory;
- determine that the transaction queue threshold continues to be violated for the time duration;
- and
- in response to determining that the transaction threshold queue continues to be violated for the time duration, alter the clock frequency controlling the rate of accessing the memory.
Dependencies are inferred from the claim text.