Acceleration of 1x1 convolutions in convolutional neural networks
AssigneesSTMicroelectronics S.r.l., STMicroelectronics International N.V.
InventorsMichele ROSSI, Thomas BOESCH, Giuseppe DESOLI
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AssigneesSTMicroelectronics S.r.l., STMicroelectronics International N.V.
InventorsMichele ROSSI, Thomas BOESCH, Giuseppe DESOLI
Estimating the term…
A convolutional accelerator includes a feature line buffer, a kernel buffer, a multiply-accumulate cluster, and mode control circuitry. In a first mode of operation, the mode control circuitry stores feature data in a feature line buffer and stores kernel data in a kernel buffer. The data stored in the buffers is transferred to the MAC cluster of the convolutional accelerator for processing. In a second mode of operation the mode control circuitry stores feature data in the kernel buffer and stores kernel data in the feature line buffer. The data stored in the buffers is transferred to the MAC cluster of the convolutional accelerator for processing. The second mode of operation may be employed to efficiently process 1×N kernels, where N is an integer greater than or equal to 1.
A convolutional accelerator, comprising:
A system, comprising:
A method, comprising:
A non-transitory computer-readable medium having contents which configure a convolutional accelerator having a plurality of modes of operation to convolve streamed kernel data with streamed feature data, the convolving including:
Dependencies are inferred from the claim text.