Fault detection circuit, method AND power adapter

A fault detection method, comprising:

• acquiring a voltage across the sampling resistor, and acquiring a first judgment signal based on the voltage across the sampling resistor;
• acquiring a voltage across an impedance unit connected in series with the sampling resistor, and acquiring a second judgment signal based on the voltage across the impedance unit, or acquiring a voltage across a circuit in which the sampling resistor is connected in series with the impedance unit, and acquiring a second judgment signal based on the voltage across the circuit in which the sampling resistor is connected in series with the impedance unit;
• and
• determining the working state of the sampling resistor based on the first judgment signal and the second judgment signal.

A power adapter, comprising a fault detection circuit, the fault detection circuit, comprising:

• a first comparison unit, a second comparison unit, an impedance unit and a digital control unit;
• the first comparison unit being connected with a sampling resistor and the digital control unit respectively, and being configured to output a first judgment signal to the digital control unit based on the voltage across the sampling resistor;
• the second comparison unit being connected with the digital control unit and the impedance unit respectively, and the impedance unit being connected in series with the sampling resistor, the second comparison unit being configured to output a second judgment signal to the digital control unit based on the voltage across the impedance unit, or the second comparison unit being respectively connected with the digital control unit and a circuit in which the sampling resistor is connected in series with the impedance unit, and the second comparison unit being configured to output a second judgment signal to the digital control unit based on the voltage across the circuit in which the sampling resistor is connected in series with the impedance unit;
• the digital control unit being configured to determine the working state of the sampling resistor based on the first judgment signal and the second judgment signal.