Epitaxial silicon channel growth
AssigneeApplied Materials, Inc.
InventorsHsiang Yu Lee, Pradeep K. Subrahmanyan
Life of this patent
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Abstract
A three-dimensional NAND flash memory structure may include solid channel cores of epitaxial silicon that are grown directly from a silicon substrate reference. The alternating oxide-nitride material layers may be formed as a stack, and a channel hole may be etched through the material layers that extends down to the silicon substrate. A tunneling layer may be formed around the channel hole to contact the alternating material layers, and an epitaxial silicon core may be grown from the silicon substrate up through the channel holes. In some implementations, support structures may be formed in channel holes or in slits of the memory array to provide physical support while the epitaxial silicon cores are grown through the channels.
Claims20
A three-dimensional (3D) NAND memory structure comprising:
- a silicon substrate;
- a plurality of alternating material layers arranged in a vertical stack on the silicon substrate, wherein a channel hole extends through the plurality of alternating material layers to the silicon substrate, wherein the channel hole is perpendicular to the plurality of alternating material layers;
- and
- a channel inside the channel hole, wherein the channel comprises:
- a tunneling layer around an interior of the channel hole contacting the plurality of alternating material layers;
- and
- an epitaxial silicon core inside the tunneling layer that contacts the silicon substrate.
A method of fabricating a three-dimensional (3D) NAND memory structure, the method comprising:
- forming a plurality of alternating material layers arranged in a vertical stack on a silicon substrate;
- etching a channel hole that extends through the plurality of alternating material layers to the silicon substrate;
- forming a tunneling layer around the channel hole contacting the plurality of alternating material layers;
- and
- epitaxially growing an epitaxial silicon core from the silicon substrate through the channel hole inside of the tunneling layer.
A three-dimensional (3D) NAND memory array comprising:
- a silicon substrate;
- a plurality of alternating material layers arranged in a vertical stack on the silicon substrate, wherein a plurality of channel holes extend through the plurality of alternating material layers;
- and
- a plurality of support structures that extend through the plurality of alternating material layers into the silicon substrate.
Dependencies are inferred from the claim text.