Semiconductor structure and method for manufacturing semiconductor structure
OwnerHong WANG, Xiaojie Liinventors
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Abstract
A semiconductor structure and a method for manufacturing the semiconductor structure are provided. The semiconductor structure comprises a substrate on which a stacked structure is provided, the stacked structure comprising a plurality of memory cell groups arranged in a first direction, each of the memory cell groups comprising multiple layers of memory cells arranged in a second direction; and a plurality of leading wire posts, wherein at least two leading wire posts are respectively in contact with the memory cells of different layers in different memory cell groups.
Claims20
A semiconductor structure, comprising:
- a substrate on which at least one stacked structure is provided, the stacked structure comprising a plurality of memory cell groups arranged in a first direction, each of the memory cell groups comprising multiple layers of memory cells arranged in a second direction;
- and
- a plurality of leading wire posts, wherein at least two leading wire posts of the plurality of leading wire posts respectively are in contact with the different layers of memory cells in different memory cell groups.
A method for manufacturing a semiconductor structure, comprising:
- providing a substrate,
- forming at least one stacked structure on the substrate, the stacked structure comprising a plurality of memory cell groups arranged in a first direction, each of the memory cell groups comprising multiple layers of memory cells arranged in a second direction;
- and
- forming a plurality of leading wire posts, wherein at least two leading wire posts of the plurality of leading wire posts respectively are in contact with different layers of memory cells in different memory cell groups.
A semiconductor structure, comprising:
- a substrate on which at least one stacked structure is provided, the stacked structure comprising a plurality of memory cell groups arranged in a first direction, each of the memory cell groups comprising multiple layers of memory cells arranged in a second direction;
- and
- a plurality of leading wire posts, wherein at least two leading wire posts of the plurality of leading wire posts are in contact with different memory cells in a same memory cell group.
Dependencies are inferred from the claim text.