# US 2023/0411513 A1 · Semiconductor device and semiconductor device manufacturing method

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- Number: US 2023/0411513 A1
- Document ID: US20230411513A1
- Status: Published application
- Kind: A1
- Application number: 18/231,377
- Filed: 2023-08-08
- Published: 2023-12-21
- Earliest claimed: 2018-02-22
- Assignees: Lapis Semiconductor Co., Ltd.
- Applicants: Lapis Semiconductor Co., Ltd.
- Inventors: TOMOMI YAMANOBE; YOSHINOBU TAKESHITA; KAZUTAKA KODAMA; MINAKO ORITU
- Web page: https://patentgrep.com/patent/US20230411513A1

## CPC

- H10D 30/668: {having trench gate electrodes, e.g. UMOS transistors}
- H10D 30/0291: {of vertical DMOS [VDMOS] FETs}
- H10D 30/0297: {using recessing of the gate electrodes, e.g. to form trench gate electrodes}
- H10D 64/117: {Recessed field plates, e.g. trench field plates or buried field plates}
- H10D 64/252: {for vertical or pseudo-vertical devices}
- H10D 64/2527: {for vertical devices wherein the source or drain electrodes are recessed in semiconductor bodies}
- H10D 84/143: {the built-in components being PN junction diodes}
- H10P 30/22: using masks
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device including: a first semiconductor layer having a first conductive type; a second semiconductor layer provided on the first semiconductor layer, the second semiconductor layer having a second conductive type that is a conductive type different from the first conductive type; an impurity region of the first conductive type formed at a surface of the second semiconductor layer; first electrodes contacting the impurity region, the second semiconductor layer, and the first semiconductor layer via a first insulating film; and second electrodes contacting the first electrodes via a second insulating film, and contacting the first semiconductor layer via a third insulating film, the second electrodes including PN junctions at borders between upper portions that contact the first semiconductor layer via the third insulating film and lower portions that contact the first semiconductor layer via the third insulating film.

## Claims

### Claim 1

A semiconductor device manufacturing method, comprising:
forming a first semiconductor layer having a first conductive type at a main surface of a semiconductor substrate;
forming first opening portions at an interior of the first semiconductor layer;
forming an insulating film at bottom surface portions and side wall portions of the first opening portions, and forming concave portions;
forming first electrodes having the first conductive type at bottom surface portions of the concave portions;
forming second electrodes having a second conductive type at upper portions of the first electrodes, the second conductive type is a conductive type different from the first conductive type;
forming third electrodes at an interior of the insulating film;
forming a second semiconductor layer having the second conductive type at the first semiconductor layer at peripheries of the first opening portions; and
forming an impurity region having the first conductive type at an upper portion of the second semiconductor layer.

### Claim 2 (depends on 1)

The semiconductor device manufacturing method of claim 1, wherein:
forming the first electrodes includes forming the first electrodes with a semiconductor layer having the first conductive type; and
forming the second electrodes includes forming the second electrodes with a semiconductor layer having the second conductive type.

### Claim 3 (depends on 1)

The semiconductor device manufacturing method of claim 1, wherein:
forming the first electrodes includes forming the first electrodes by ion implanting impurities having the first conductive type; and
forming the second electrodes includes forming the second electrodes by ion implanting impurities having the second conductive type.

### Claim 4 (depends on 1)

The semiconductor device manufacturing method of claim 1, further comprising forming a layered oxide film on the first electrodes, between forming the first electrodes and forming the second electrodes.