# US 2023/0411418 A1 · Imaging sensing device and method of manufacturing the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2023/0411418 A1 - Document ID: US20230411418A1 - Status: Published application - Kind: A1 - Application number: 18/075,354 - Filed: 2022-12-05 - Published: 2023-12-21 - Earliest claimed: 2022-06-14 - Assignees: SK hynix Inc. - Applicants: SK hynix Inc. - Inventors: Hyun Soo LIM; Seung Hoon SA - Web page: https://patentgrep.com/patent/US20230411418A1 ## CPC - H10F 39/80373: {characterised by the gate of the transistor} - H10F 39/014: {of CMOS image sensors} - H10F 39/18: Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors - H10F 39/8037: {the integrated elements comprising a transistor} - H10F 39/813: {Electronic components shared by multiple pixels, e.g. one amplifier shared by two pixels} - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION ## Abstract An image sensing device may include a substrate, a first gate, a photoelectric converter, a first semiconductor pattern including a floating diffusion, a second semiconductor pattern and a second gate. The substrate includes a light-receiving region and at least one active region. The first gate is arranged over the light-receiving region. The photoelectric converter is formed in the light-receiving region such that a first end of the first gate is disposed over the photoelectric converter. The first semiconductor pattern is formed over the substrate at a second end of the first gate. The first semiconductor pattern has a first height. The second semiconductor pattern is formed over the active region of the substrate. The second semiconductor pattern has a second height. The second gate is formed over the active region of the substrate to cover the second semiconductor pattern. ## Claims ### Claim 1 An image sensing device comprising: a substrate; a light-receiving region supported by the substrate to receive incident light and structured to include a photoelectric converter configured to detect the incident light to generate photo-charge carrying an image in the incident light; at least one active region supported by the substrate and located adjacent to the light-receiving region; a first gate formed over an upper surface of the substrate such that a first end of the first gate is disposed over the photoelectric converter; a first semiconductor pattern formed over the upper surface of the substrate at a second end of the first gate opposite to the first end and including a floating diffusion region, the first semiconductor pattern having a first height from the upper surface of the substrate; a second semiconductor pattern formed over the upper surface of the substrate corresponding to the active region, the second semiconductor pattern having a second height from the upper surface of the substrate; and a second gate formed over the upper surface of the substrate corresponding to the active region to cover the second semiconductor pattern. ### Claim 2 (depends on 1) The image sensing device of claim 1, wherein the first gate includes a first portion and a second portion, the first portion disposed over the photoelectric converter, the second portion disposed on a sidewall of the first semiconductor pattern. ### Claim 3 (depends on 1) The image sensing device of claim 1, wherein the first gate comprises a gate insulation layer and a gate conductive layer disposed on the gate insulation layer, wherein a thickness of a portion of the gate insulation layer located between the first gate and the photoelectric converter is thicker than a thickness of another portion of the gate insulation layer located between the first gate and the floating diffusion region. ### Claim 4 (depends on 1) The image sensing device of claim 1, wherein the active region and the second semiconductor pattern have a same width in a first direction, a width of the second semiconductor pattern in a second direction is shorter than a width of the active region in the second direction, wherein the second direction is substantially perpendicular to the first direction. ### Claim 5 (depends on 4) The image sensing device of claim 4, wherein the second semiconductor pattern is positioned in a region that includes a center of the active region. ### Claim 6 (depends on 1) The image sensing device of claim 1, wherein the second gate is in contact with: an upper surface of the second semiconductor pattern; both sidewalls extending from both ends of the upper surface of the second semiconductor pattern; and the active regions at both sides of the second semiconductor pattern. ### Claim 7 (depends on 1) The image sensing device of claim 1, further comprising a junction region formed in the active region and the second semiconductor pattern at both sides of the second gate. ### Claim 8 (depends on 1) The image sensing device of claim 1, wherein the second gate includes a gate electrode of any one of; a reset transistor configured to initialize the floating diffusion region to a power voltage level; a drive transistor configured to generate an output signal corresponding to an amount of photo-charge stored in the floating diffusion region; a selection transistor configured to transmit the output signal to a column line; or a conversion gain transistor configured to change a capacitance of the floating diffusion region. ### Claim 9 (depends on 1) The image sensing device of claim 1, wherein the second gate includes a gate insulation layer and a gate conductive layer stacked on the gate insulation layer, wherein a thickness of a portion of the gate insulation layer located between the second gate and the substrate in the active region is thicker than a thickness of another portion of the gate insulation layer located between the second gate and the second semiconductor pattern. ### Claim 10 (depends on 1) The image sensing device of claim 1, wherein the first and second semiconductor patterns comprise an epitaxial layer including a material that is substantially identical to a material included in the substrate, wherein the first height is substantially identical to the second height. ### Claim 11 An image sensing device comprising: a substrate; first and second semiconductor patterns supported by the substrate and protruding from the substrate, the first semiconductor pattern including a floating diffusion region; at least one photoelectric converter configured to detect incident light to generate photo-charge carrying an image in the incident light, the at least one photoelectric converter formed in a portion of the substrate adjacent to the floating diffusion region to generate photo-charge corresponding to incident light; at least one transfer transistor supported by the substrate and configured to transfer the photo-charge generated by the at least one photoelectric converter to the floating diffusion region in response to a transfer signal; a reset transistor supported by the substrate and configured to initialize the floating diffusion region to a power voltage level in response to a reset signal; a drive transistor supported by the substrate and configured to generate an output signal corresponding to an amount of the photo-charge stored in the floating diffusion; and a selection transistor supported by the substrate and configured to output the output signal generated by the drive transistor, in response to a selection signal, wherein at least one of the reset transistor, the drive transistor or the selection transistor comprises a fin gate structured to surround a side surface and an upper surface of the second semiconductor pattern. ### Claim 12 (depends on 11) The image sensing device of claim 11, further comprising a conversion gain transistor supported by the substrate and configured to change a capacitance of the floating diffusion region in response to a conversion gain signal, wherein the conversion gain transistor comprises a fin gate structured to surround the side surface and the upper surface of the second semiconductor pattern. ### Claim 13 (depends on 12) The image sensing device of claim 12, wherein the fin gate comprises a gate insulation layer and a gate conductive layer disposed on the gate insulation layer, wherein a thickness of a portion of the gate insulation layer located between the gate and the substrate is different from a thickness of a portion of the gate insulation layer located between the gate and the second semiconductor pattern. ### Claim 14 (depends on 11) The image sensing device of claim 11, wherein a portion of a gate electrode of the transfer transistor is in contact with a sidewall of the first semiconductor pattern. ### Claim 15 (depends on 14) The image sensing device of claim 14, wherein the gate of the transfer transistor comprises a gate insulation layer and a gate conductive layer disposed on the gate insulation layer, wherein a thickness of a portion of the gate insulation layer located between the gate and the substrate is different from a thickness of a portion of the gate insulation layer located between the gate and the first semiconductor pattern. ### Claim 16 A method of manufacturing an image sensing device, the method comprising: forming a first insulation layer on a substrate that includes a light-receiving region and an active region adjacent to the light-receiving region, wherein the light-receiving region includes a photoelectric converter configured to detect incident light to generate photo-charge carrying an image in the incident light; selectively etching the first insulation layer to form a first opening to partially expose the light-receiving region of the substrate and a second opening to partially expose the active region of the substrate; forming first and second semiconductor patterns on the substrate exposed through the first and second openings; forming a second insulation layer on the first insulation layer, the first semiconductor pattern and the second semiconductor pattern; forming a gate conductive layer on the second insulation layer; etching the gate conductive layer, the second insulation layer and the first insulation layer to form a first gate over the light-receiving region of the substrate and a second gate over the active region of the substrate; and implanting impurities into the first semiconductor pattern to form a floating diffusion. ### Claim 17 (depends on 16) The method of claim 16, wherein the first and second semiconductor patterns are formed by a selective epitaxial growth process. ### Claim 18 (depends on 17) The method of claim 17, wherein the first and second semiconductor patterns are formed by epitaxially growing the substrate by a same thickness. ### Claim 19 (depends on 16) The method of claim 16, wherein the gate conductive layer over the light-receiving region of the substrate is etched to form the first gate positioned over one end of the light-receiving region to cover a sidewall of the first semiconductor pattern, and the gate conductive layer over the active region is etched to form the second gate to cover the second semiconductor pattern. ### Claim 20 (depends on 16) The method of claim 16, further comprising implanting impurities into the active region and the second semiconductor pattern at both sides of the second gate to form junction regions.