# US 2023/0411401 A1 · Display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2023/0411401 A1 - Document ID: US20230411401A1 - Status: Published application - Kind: A1 - Application number: 18/459,677 - Filed: 2023-09-01 - Published: 2023-12-21 - Earliest claimed: 2018-01-11 - Assignees: Japan Display Inc. - Applicants: Japan Display Inc. - Inventors: Isao SUZUMURA - Web page: https://patentgrep.com/patent/US20230411401A1 ## CPC - H10D 86/60: wherein the TFTs are in active matrices - G02F 1/1368: in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} - G09F 9/30: in which the desired character or characters are formed by combining individual elements (panels comprising a number of electrodes in a single cell controlling light arriving from an independent light source, e.g. electro-optical or magneto-optical cell, G02F1/00) - H10D 30/6723: {having light shields} - H10D 30/673: {characterised by the shapes, relative sizes or dispositions of the gate electrodes} - H10D 30/6739: {Conductor-insulator-semiconductor electrodes} - H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate} - H10D 64/01: Manufacture or treatment - H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO} - H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics} - H10D 99/00: Subject matter not provided for in other groups of this subclass - H10K 59/126: Shielding, e.g. light-blocking means over the TFTs - G02F 1/13685: {Top gates} - H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs} - H10K 59/1213: {the pixel elements being TFTs} - H10P 30/22: using masks - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS - G09F: DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract The purpose of the present invention is to decrease the resistance of the drain and source in the TFT of the oxide semiconductor as well as to have stable Vd-Id characteristics of the TFT. The structure of the present invention is as follows: A display device having plural pixels including thin film transistors (TFT) having oxide semiconductor films comprising: a gate insulating film formed on the oxide semiconductor film, an aluminum oxide film formed on the gate insulating film, a gate electrode formed on the aluminum oxide film, a side spacer formed on both sides of the gate electrode, and an interlayer insulating film formed on the gate electrode, the side spacer, a drain and a source, wherein in a plan view, and in a direction from the drain to the source, a length of the gate electrode is shorter than a length of the aluminum oxide film. ## Claims ### Claim 1 A semiconductor device having thin film transistors comprising: oxide semiconductor film, drain, source, a gate insulating film formed on the oxide semiconductor film, an aluminum oxide film formed on the gate insulating film, a gate electrode and a side spacer formed on the aluminum oxide film, and an interlayer insulating film formed on the gate electrode, the side spacer, the drain and the source, wherein in a plan view, and in a direction from the drain to the source, a length of the gate electrode is shorter than a length of the aluminum oxide film, the gate electrode covers a inner surface of the side spacer and a top surface of the side spacer, a side surface, which contacts with the interlayer insulating film, of the side spacer is a tapered surface. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein a length, in the direction from the drain to the source, of the gate electrode on the top of the side spacer is 0.1 microns or more. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein the oxide semiconductor film has a channel, which is formed between the drain and the source, an intermediate region is formed between the channel and the drain and between the channel and the source, a gate insulating film is formed on the channel and the intermediate region of the oxide semiconductor film, the gate electrode is formed on the aluminum oxide film above the channel, and a content of hydrogen in the oxide semiconductor film, is: in the channel