Process for transforming a trained artificial neuron network
AssigneeSTMicroelectronics (Rousset) SAS
InventorsLaurent Folliot, Pierre Demaj
Life of this patent
Estimating the term…
Abstract
According to one aspect, there is proposed a method for transforming a trained artificial neural network including a binary convolution layer followed by a pooling layer then a batch normalization layer, the method includes obtaining the trained artificial neural network and transforming the trained artificial neural network such that the order of the layers of the trained artificial neural network is modified by displacing the batch normalization layer after the convolution layer.
Claims20
A method, comprising:
- having a trained artificial neural network comprising a binary convolution layer, a pooling layer, and a batch normalization layer, wherein the pooling layer is arranged between the binary convolution layer and the batch normalization layer in the trained artificial neural network;
- and
- converting the trained artificial neural network to a transformed artificial neural network, wherein the batch normalization layer is arranged between the binary convolution layer and the pooling layer in the transformed artificial neural network.
A non-transitory computer-readable media storing computer instructions that, when executed by a processor, cause the processor to convert a trained artificial neural network to a transformed artificial neural network, wherein the trained artificial neural network comprises a binary convolution layer, a pooling layer, and a batch normalization layer, wherein the pooling layer is arranged between the binary convolution layer and the batch normalization layer in the trained artificial neural network, and wherein the batch normalization layer is arranged between the binary convolution layer and the pooling layer in the transformed artificial neural network.
A microcontroller, comprising:
- a non-transitory memory storage comprising instructions;
- and
- a processor in communication with the non-transitory memory storage, wherein the instructions, when executed by the processor, cause the processor to convert a trained artificial neural network stored embedded in the microcontroller to a transformed artificial neural network, wherein the trained artificial neural network comprises a binary convolution layer, a pooling layer, and a batch normalization layer, wherein the pooling layer is arranged between the binary convolution layer and the batch normalization layer in the trained artificial neural network, and wherein the batch normalization layer is arranged between the binary convolution layer and the pooling layer in the transformed artificial neural network.
Dependencies are inferred from the claim text.