Simultaneous placement and routing based method and apparatus for incremental design optimization, and computer device

A simultaneous placement and routing based apparatus for incremental design optimization, comprising:

• an acquisition module for acquiring an information file generated after logic synthesis, the information file comprising a net-list file and multiple constraint files representing a logical relationship among units;
• a classification module for classifying the acquired multiple constraint files to form at least two or more constraint file types comprising a core constraint file type;
• a placement and routing module for sequentially placing modules, each comprising a plurality of units, on an initial coarse grid and simultaneously performing routing of each of the modules and a placed module according to the net-list file and the core constraint file;
• a verification module for performing iterative verification on placement and routing of the modules based on the core constraint file, the placement and routing module adjusting the position or size of an illegal module not meeting requirements of the core constraint file and simultaneously adjusting routing of the illegal module according to a verification result, until the placement and routing of a plurality of the modules meet the requirements of the core constraint file;
• and
• a grid refinement module for refining the grid, the placement and routing module dividing each of the modules into a plurality of sub-modules and performing simultaneous placement and routing on the plurality of sub-modules in a refined grid where each of the modules is located, the verification module performing verification based on the core constraint file, the placement and routing module adjusting the position or size of an illegal sub-module not meeting the requirements of the core constraint file and simultaneously adjusting routing of the illegal sub-module according to an iterative verification result, until the placement and routing of the plurality of sub-modules meet the requirements of the core constraint file, and
• repeating the grid refinement, the sub-module subdivision, the simultaneous placement and routing of the subdivided sub-modules, the iterative verification, and the simultaneous adjustment of placement and routing of illegal subdivided sub-modules, until the iterative verification meets the requirements of the core constraint file and timing convergence.