Machine learning techniques for circuit design verification
AssigneeTexas Instruments Incorporated
InventorsVenkateswaran PADMANABHAN, Gopika KUMAR, Guha LAKSHMANAN, Kriyangbhai SHAH
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Abstract
A method includes obtaining a set of simulated signal values for an integrated circuit, providing the obtained set of simulated signal values to a machine learning model, and obtaining, from the machine learning model, one or more predicted output signal values of the integrated circuit. The method also includes comparing the predicted output signal values to actual output signal values of the integrated circuit to validate the integrated circuit.
Claims20
A method, comprising:
- obtaining a set of simulated signal values for an integrated circuit;
- providing the obtained set of simulated signal values to a machine learning model;
- obtaining, from the machine learning model, one or more predicted output signal values of the integrated circuit;
- and
- comparing the predicted output signal values to actual output signal values of the integrated circuit to validate the integrated circuit.
A non-transitory program storage device comprising instructions stored thereon to cause one or more processors to:
- obtain a set of simulated signal values for an integrated circuit;
- provide the obtained set of simulated signal values to a machine learning model;
- obtain, from the machine learning model, one or more predicted output signal values of the integrated circuit;
- and
- compare the predicted output signal values to actual output signal values of the integrated circuit to validate the integrated circuit.
A system for debugging an integrated circuit, comprising:
- a memory;
- and
- one or more processors operatively coupled to the memory, wherein the one or more processors are configured to execute instructions causing the one or more processors to:
- obtain a set of simulated signal values for an integrated circuit;
- provide the obtained set of simulated signal values to a machine learning model;
- obtain, from the machine learning model, one or more predicted output signal values of the integrated circuit;
- and
- compare the predicted output signal values to actual output signal values of the integrated circuit to validate the integrated circuit.
Dependencies are inferred from the claim text.