Flexible cache allocation technology priority-based cache line eviction algorithm

A processor comprising:

• a plurality of cores;
• a set associative cache;
• and
• a cache control circuit coupled with the set associative cache, the cache control circuit to:
• receive a cache fill request for an incoming cache line corresponding to an application;
• select a victim cache line in the set associative cache based at least in part on a maximum occupancy bound specified for the application and a current occupancy in the set associative cache for the application, wherein the maximum occupancy bound corresponds to a maximum number of ways per set to be used by the application, and wherein the current occupancy is a number of ways currently used by the application in a set indexed by the incoming cache line;
• and
• store the incoming cache line to a location of the selected victim cache line.

An apparatus comprising:

• a memory controller;
• and
• a processor coupled with the memory controller, the processor comprising:
• a plurality of cores;
• a set associative cache;
• and
• a cache control circuit coupled with the set associative cache, the cache control circuit to:
• receive a cache fill request for an incoming cache line corresponding to an application;
• select a victim cache line in the set associative cache based at least in part on a maximum occupancy bound specified for the application and a current occupancy in the set associative cache for the application, wherein the maximum occupancy bound corresponds to a maximum number of ways per set to be used by the application, and wherein the current occupancy is a number of ways currently used by the application in a set indexed by the incoming cache line;
• and
• store the incoming cache line to a location of the selected victim cache line.

A system comprising:

• a system memory;
• and
• a processor coupled with the system memory, the processor comprising:
• a plurality of cores;
• a set associative cache;
• and
• a cache control circuit coupled with the set associative cache, the cache control circuit to:
• receive a cache fill request for an incoming cache line corresponding to an application;
• select a victim cache line in the set associative cache based at least in part on a maximum occupancy bound specified for the application and a current occupancy in the set associative cache for the application, wherein the maximum occupancy bound corresponds to a maximum number of ways per set to be used by the application, and wherein the current occupancy is a number of ways currently used by the application in a set indexed by the incoming cache line;
• and
• store the incoming cache line to a location of the selected victim cache line.

A method comprising:

• processing data with a plurality of cores;
• storing data in a set associative cache;
• receiving, at a cache control circuit, a cache fill request for an incoming cache line corresponding to an application;
• selecting, with the cache control circuit, a victim cache line in the set associative cache based at least in part on a maximum occupancy bound specified for the application and a current occupancy in the set associative cache for the application, wherein the maximum occupancy bound corresponds to a maximum number of ways per set to be used by the application, and wherein the current occupancy is a number of ways currently used by the application in a set indexed by the incoming cache line;
• and
• storing the incoming cache line to a location of the selected victim cache line.