Method and apparatus for training memory
AssigneeAdvanced Micro Devices, Inc.
InventorsAnwar Kashem, Craig Daniel Eaton, Pouya Najafi Ashtiani, Tsun Ho Liu
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Abstract
A method and apparatus for training data in a computer system includes reading data stored in a first memory address in a memory and writing it to a buffer. Training data is generated for transmission to the first memory address. The data is transmitted to the first memory address. Information relating to the training data is read from the first memory address and the stored data is read from the buffer and written to the memory area where the training data was transmitted.
Claims20
A method for training a memory area in a computer system, comprising:
- reading first data stored in a first memory address in a memory and writing the first data to a buffer;
- generating training data for transmission to the first memory address, and transmitting the training data to the first memory address;
- reading information relating to the training data from the first memory address, the information comprising a voltage offset;
- and
- reading the first data from the buffer and writing the first data to the first memory address where the training data was transmitted based upon the information relating to the training data.
(canceled)
An apparatus for training a memory area in a computer system, comprising:
- a memory;
- a processor operatively coupled to and in communication with the memory, the processor configured to:
- read first data stored in a first memory address in the memory and write the first data to a buffer;
- generate training data for transmission to the first memory address, and transmit the training data to the first memory address;
- read information relating to the training data from the first memory address, the information comprising a voltage offset;
- and
- read the first data from the buffer and write the first data to the first memory address where the training data was transmitted based upon the information relating to the training data.
(canceled)
A non-transitory computer-readable medium for training a memory area in a computer system, the non-transitory computer-readable medium having instructions recorded thereon that, when executed by the processor, cause the processor to perform operations including:
- reading first data stored in a first memory address in a memory and writing the first data to a buffer;
- generating training data for transmission to the first memory address, and transmitting the training data to the first memory address;
- reading information relating to the training data from the first memory address, the information comprising a voltage offset;
- and
- reading the first data from the buffer and writing the first data to the first memory address where the training data was transmitted based upon the information relating to the training data.
Dependencies are inferred from the claim text.