Memory sharing control method and device, computer device, and system
AssigneeHuawei Technologies Co., Ltd.
InventorsYigang Zhou, Xiaoming Zhu, Guanfeng Zhou
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Abstract
In a computer device, a memory sharing control device is deployed between a processor and a memory pool, and the processor accesses the memory pool via the memory sharing control device. Different processing units, such as processors or cores in processors, access one memory in the memory pool in different time periods, so that the memory is shared by a plurality of processing units, and utilization of memory resources is improved.
Claims20
A computer device comprising:
- multiple processing units;
- a memory sharing control device;
- and
- a memory pool,
- wherein each processing unit is a processor, a core in a processor, or a combination of cores in a processor, and the memory pool comprises multiple memories, the processing units are coupled to the memory sharing control device, the memory sharing control device is configured to allocate a memory in the memory pool to the processing units, and the memory in the memory pool is accessible by different processing units in different time periods, and the processing units are configured to access the allocated memory via the memory sharing control device.
A memory sharing control device comprising:
- a control unit;
- a processor interface;
- and
- a memory interface,
- wherein the processor interface is configured to receive memory access requests sent by multiple processing units, wherein each processing unit is a processor, a core in a processor, or a combination of cores in a processor;
- the control unit is configured to allocate a memory in a memory pool to the multiple processing units, wherein the memory in the memory pool is accessible by different processing units in different time periods;
- and
- the control unit is further configured to access, through the memory interface, the memory allocated to the multiple processing units.
A memory sharing control method performed by a computer device comprising multiple processing units, a memory sharing control device, and a memory pool comprising multiple memories, the method comprising:
- receiving, by the memory sharing control device, a first memory access request sent by a first processing unit in the multiple processing units, wherein each processing unit is a processor, a core in a processor, or a combination of cores in a processor;
- allocating, by the memory sharing control device, a first memory from the memory pool to the first processing unit for a first period, wherein the first memory is accessible by a second processing unit in the multiple processing units in a second time period;
- and
- accessing, by the first processing unit, the first memory via the memory sharing control device.
Dependencies are inferred from the claim text.