Nor-type memory device, method of manufacturing nor-type memory device, and electronic apparatus including memory device

A NOR-type memory device, comprising:

• a gate stack extending vertically on a substrate, wherein the gate stack comprises a gate conductor layer and a memory functional layer;
• and
• a first semiconductor layer and a second semiconductor layer that surround a periphery of the gate stack and extend along a sidewall of the gate stack, wherein the first semiconductor layer and the second semiconductor layer are respectively located at different heights with respect to the substrate,
• wherein the memory functional layer is located between the first semiconductor layer and the gate conductor layer, and between the second semiconductor layer and the gate conductor layer,
• wherein each of the first semiconductor layer and the second semiconductor layer comprises a first source/drain region, a channel region, and a second source/drain region that are disposed in sequence in a vertical direction, and
• wherein a memory cell is defined at each of an intersection of the gate stack and the first semiconductor layer and an intersection of the gate stack and the second semiconductor layer.