Circuit board

A circuit board comprising:

• a first substrate layer;
• a second substrate layer disposed on the first substrate layer;
• and
• a third substrate layer disposed under the first substrate layer;
• wherein the second substrate layer includes:
• a first inner circuit pattern layer disposed on the first substrate layer;
• and
• a first outermost circuit pattern layer disposed on the first inner circuit pattern layer,
• wherein the third substrate layer includes:
• a second inner circuit pattern layer disposed under the first substrate layer;
• and
• a second outermost circuit pattern layer disposed under the second inner circuit pattern layer,
• wherein a thickness of each of the first and second outermost circuit pattern layers is greater than a thickness of each of the first and second inner circuit pattern layers, and
• wherein a thickness of the first outermost circuit pattern layer is different from a thickness of the second outermost circuit pattern layer.

An antenna substrate comprising:

• a circuit board including a first substrate layer, a second substrate layer disposed on the first substrate layer and a third substrate layer disposed under the first substrate layer;
• and
• a semiconductor device mounted under the third substrate layer of the circuit board;
• wherein the second substrate layer includes an antenna pattern layer including a first inner circuit pattern layer and a first outermost circuit pattern layer for transmitting and receiving an antenna signal,
• wherein the third substrate layer includes a driving pattern layer including a second inner circuit pattern layer and a second outermost circuit pattern layer connected to the semiconductor device and transmitting signals between the antenna pattern layer and the semiconductor device,
• wherein a thickness of each of the first and second outermost circuit pattern layers is greater than a thickness of each of the first and second inner circuit pattern layers, and
• wherein the thickness of the first outermost circuit pattern layer is greater than the thickness of the second outermost circuit pattern layer.