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US 2023/0402091 A1Published application
Non-volatile memory device with reference voltage circuit
AssigneeGlobalFoundries U.S. Inc.
InventorsVenkatesh P. Gopinath, Xiaoli Hu, Thomas Melde, Nicki N. Mika
Life of this patent
Estimating the term…
Abstract
Structures herein include an array of non-volatile memory cells. The non-volatile memory cells include memory bit cells and at least one reference bit cell that is adjacent the memory bit cells. These structures also include at least one reference voltage regulator connected to the reference bit cell, and at least one sense amplifier connected to the memory bit cells and the reference voltage regulator.
Claims20
A structure comprising:
- an array of non-volatile memory cells, wherein the non-volatile memory cells comprise memory bit cells and reference bit cells adjacent the memory bit cells;
- at least one reference voltage regulator connected to the reference bit cells;
- and
- at least one sense amplifier connected to the memory bit cells and the reference voltage regulator.
1 more element
A structure comprising:
- an array of non-volatile memory cells, wherein the non-volatile memory cells comprise memory bit cells and reference bit cells;
- wordlines and bitlines connected to the non-volatile memory cells, wherein the bitlines comprise memory cell bitlines connected to the memory bit cells, and reference cell bitlines connected to the reference bit cells;
- at least one reference voltage regulator connected to the reference cell bitlines;
- and
- at least one sense amplifier connected to the memory cell bitlines and the reference voltage regulator.
2 more elements
A structure comprising:
- an array of non-volatile memory cells, wherein the non-volatile memory cells comprise memory bit cells and reference bit cells;
- wordlines and bitlines connected to the non-volatile memory cells, wherein the bitlines comprise memory cell bitlines connected to the memory bit cells, and reference cell bitlines connected to the reference cell bitlines, and wherein the reference cell bitlines are physically between ones of the memory cell bitlines;
- at least one reference voltage regulator connected to the reference cell bitlines;
- and
- at least one sense amplifier connected to the memory cell bitlines and the reference voltage regulator.
2 more elements
Dependencies are inferred from the claim text.