Display substrate and display device

A display substrate, comprising:

• a base substrate, comprising a display area and a border area arranged outside the display area, wherein the display area comprises:
• a first display area, and a second display area at least arranged on a side of the first display area;
• a plurality of light emitting devices, arranged on the base substrate in an array, wherein the plurality of light emitting devices comprise:
• a plurality of first light emitting devices in the first display area, and a plurality of second light emitting devices in the second display area;
• a plurality of pixel driving circuits, arranged between the base substrate and the light emitting devices, wherein the plurality of pixel driving circuits comprise:
• a plurality of first pixel driving circuits and a plurality of second pixel driving circuits, the plurality of first pixel driving circuits and the plurality of first light emitting devices are correspondingly electrically connected, the plurality of second pixel driving circuits at least partially overlap with the plurality of second light emitting devices, and the plurality of second pixel driving circuits are correspondingly electrically connected with the plurality of second light emitting devices, at least one of the plurality of second pixel driving circuits is provided with a driving transistor, a threshold compensation transistor, and a gate connection electrode, and the gate connection electrode is electrically connected with a gate electrode of the driving transistor and a source electrode of the threshold compensation transistor, or the gate connection electrode is electrically connected with a gate electrode of the driving transistor and a drain electrode of the threshold compensation transistor;
• and
• a plurality of connection leads, wherein each of at least part of the connection leads is electrically connected with at least one first pixel driving circuit and one first light emitting device, and orthographic projections of the connection leads on the base substrate do not overlap an orthographic projection of the gate connection electrode on the base substrate.