Low power non-volatile non-charge-based variable supply rfid tag memory

A method for writing a predetermined identification (ID) value to each of a plurality of non-charge-based memory components in a low power non-volatile non-charge-based variable supply radio frequency identification (RFID) tag memory device including a system memory, a reference/bias generator, a shift register, a ring counter, a write decision component and a read/write component, comprising the steps of:

• providing the predetermined ID value to be respectively written to each of corresponding ones of the plurality of non-charge-based memory components in the system memory forming a part of a predetermined ID for the RFID tag memory device;
• providing to the reference/bias generator an input voltage and providing by the reference/bias generator voltage and current for enabling writing the predetermined ID value respectively to each of the corresponding ones of the plurality of non-charge-based memory components of the memory cell forming a part of the predetermined ID for the RFID tag memory device;
• providing write clock signals for sequentially respectively writing the predetermined ID value to each of the corresponding ones of the plurality of non-charge-based memory components forming a part of the predetermined ID for the RFID tag memory device;
• receiving by the shift register, in response to corresponding ones of the write clock signals, each predetermined ID value forming a part of the predetermined ID for the RFID tag memory device and saving in corresponding registers of the shift register each received predetermined ID value;
• providing a plurality of ring signals from the ring counter, each ring signal for respectively sequentially writing to the corresponding ones of the plurality of non-charge-based memory components forming a part of the predetermined ID for the RFID tag memory device the predetermined ID value saved in the shift register for each of the corresponding ones of the plurality of non-charge-based memory components;
• sequentially receiving by the write decision component the plurality of ring signals from the ring counter and each predetermined ID value saved in the shift register and, in response to corresponding ones of the received ring signals, the write decision component providing a write decision to selectively enable a write operation to sequentially respectively write the received predetermined ID value to each of the corresponding ones of the plurality of non-charge-based memory components forming a part of the predetermined ID for the RFID tag memory device;
• and
• sequentially receiving by the read/write component each provided write decision from the write decision component, the plurality of ring signals from ring counter and a write current from the reference/bias generator and, in response to corresponding ones of the received ring signals, the read/write component sequentially respectively writing, in response to each provided write decision received from the write decision component, the predetermined ID value to each of the corresponding ones of the plurality of non-charge-based memory components forming a part of the predetermined ID for the RFID tag memory device, and each written predetermined ID value collectively comprising the predetermined ID of the RFID tag memory device.

A method for reading a predetermined identification (ID) value from each of a plurality of non-charge-based memory components in a low power non-volatile non-charge-based variable supply radio frequency identification (RFID) tag memory device including a system memory, a reference/bias generator, a clocked comparator, a shift register, a ring counter, an output select/isolation component, and a read/write component, comprising the steps of:

• providing to the reference/bias generator an input voltage and providing by the reference/bias generator voltage and current for selectively respectively reading from each of corresponding ones of the plurality of non-charge-based memory components of the system memory the predetermined ID value forming a part of a predetermined ID for the RFID tag memory device;
• providing read clock signals for sequentially respectively reading from each of the corresponding ones of the plurality the non-charge-based memory components the predetermined ID value forming a part of the predetermined ID for the RFID tag memory device;
• providing to a 90 degree phase shifter associated with the clocked comparator a read clock signal of the read clock signals, and for each read clock signal provided to the 90 degree phase shifter generating by the 90 degree phase shifter a comparator clock signal and, for each read clock signal provided to the 90 degree phase shifter, providing to the shift register a shift register clock signal;
• providing each generated comparator clock signal from the 90 degree phase shifter to the clocked comparator;
• providing to the clocked comparator a reference voltage from the reference/bias generator and a voltage generated corresponding to a non-charge-based memory component voltage respectively for each of the corresponding ones of the plurality of non-charge-based memory components forming a part of the predetermined ID for the RFID tag memory device and, for each of the corresponding ones of the plurality of non-charge-based memory components, in response to a corresponding provided comparator clock signal from the 90 degree phase shifter, comparing by the clocked comparator the reference voltage and the voltage generated corresponding to the non-charge-based memory component voltage for a corresponding one of the corresponding ones of the plurality of non-charge-based memory components and providing by the clocked comparator a non-charge-based memory component resulting value as a result of the comparison, the non-charge-based memory component resulting value corresponding to the predetermined ID value for the corresponding one of the corresponding ones of the plurality of non-charge-based memory components forming a part of the predetermined ID for the RFID tag memory device;
• providing to the shift register from the clocked comparator, in response to a corresponding shift register clock signal provided to the shift register, the non-charge-based memory component resulting value for the corresponding one of the corresponding ones of the plurality of non-charge-based memory components forming a part of the predetermined ID for the RFID tag memory device and reading into a register of the shift register the provided non-charge-based memory component resulting value, and saving in corresponding registers of the shift register the non-charge-based memory component resulting value for each of the corresponding ones of the plurality of non-charge-based memory components forming a part of the predetermined ID for the RFID tag memory device for readout from the shift register, each non-charge-based memory component resulting value stored in the corresponding registers of the shift register collectively comprising the predetermined ID for the RFID tag memory device;
• providing a plurality of ring signals from the ring counter, the ring signals of the ring counter enabling the sequential reading of the non-charge-based memory component voltage respectively from each of the corresponding ones of the plurality of non-charge-based memory components the predetermined ID value respectively written to each of the corresponding ones of the plurality of non-charge-based memory components forming a part of the predetermined ID for the RFID tag memory device;
• sequentially receiving by the read/write component the ring signals from the ring counter and a read current from the reference/bias generator and, in response to corresponding ones of the received ring signals, sequentially reading by the read/write component from each of the corresponding ones of the plurality of non-charge-based memory components forming a part of the predetermined ID for the RFID tag memory device the non-charge-based memory component voltage the predetermined ID value respectively written to each of the corresponding ones of the plurality of non-charge-based memory components forming a part of the predetermined ID for the RFID tag memory device, and generating by the read/write component respectively for each of the corresponding ones of the plurality of non-charge-based memory components forming a part of the predetermined ID for the RFID tag memory device the voltage generated the non-charge-based memory component voltage respectively read from each of the corresponding ones of the plurality of non-charge-based memory components forming a part of the predetermined ID for the RFID tag memory device;
• and
• receiving sequentially by the output select/isolation component the ring signals from the ring counter and, in response to corresponding ones of the received ring signals, receiving sequentially by the output select/isolation component from the read/write component each voltage generated corresponding to the non-charge-based memory component voltage respectively read from each of the corresponding ones of the plurality of non-charge-based memory components forming a part of the predetermined ID for the RFID tag memory device, and sequentially providing by the output select/isolation component to the clocked comparator for the comparison with the reference voltage each received voltage generated corresponding to the non-charge-based memory component voltage respectively read from each of the corresponding ones of the plurality of non-charge-based memory components to respectively provide from the comparison the non-charge-based memory component resulting value corresponding to the predetermined ID value for each of the corresponding ones of the plurality of non-charge-based memory components.