Memory array page table walk
AssigneeMicron Technology, Inc.
InventorPerry V. Lea
Life of this patent
Estimating the term…
Abstract
An example memory array page table walk can include using an array of memory cells configured to store a page table. The page table walk can include using sensing circuitry coupled to the array. The page table walk can include using a controller coupled to the array. The controller can be configured to operate the sensing circuitry to determine a physical address of a portion of data by accessing the page table in the array of memory cells. The controller can be configured to operate the sensing circuitry to cause storing of the portion of data in a buffer.
Claims21
1-20. (canceled)
An apparatus, comprising:
- an array of memory cells;
- sensing circuitry coupled to the array of memory cells;
- and
- a compute component coupled to the sensing circuitry;
- wherein the apparatus is configured to:
- store a page table in the array of memory cells;
- and
- perform a number of operations via the compute component to determine a physical address of a portion of data by accessing the page table.
A method, comprising:
- using a compute component that is coupled to sensing circuitry, which is coupled to an array of memory cells, to perform a number of operations including:
- determining that a virtual address corresponding to a physical address of data is not located in a translation lookaside buffer (TLB);
- and
- performing a page table walk in a memory array comprising memory cells coupled to a plurality of access lines and to a plurality of sense lines, wherein the page table walk comprises performing each of a number of logical operations using the compute component to determine the physical address.
An apparatus, comprising:
- an array of memory cells;
- sensing circuitry coupled to the array of memory cells;
- and
- a compute component coupled to the sensing circuitry;
- wherein the apparatus is configured to:
- store a page table in the array of memory cells;
- in response to a virtual address being absent from a translation lookaside buffer (TLB), perform a walk through the page table including resolving page table levels simultaneously using the compute component to perform a number of logical operations;
- and
- determine a physical address of a portion of data based on the page table walk.
Dependencies are inferred from the claim text.