Folded instruction fetch pipeline

A method, comprising:

• in an instruction fetch pipeline that includes:
• a first sub-pipeline that includes a translation lookaside buffer (TLB) configured to receive a fetch virtual address;
• a second sub-pipeline that includes a tag random access memory (RAM) of a physically-indexed physically-tagged set associative instruction cache configured to receive a predicted set index, wherein the predicted set index specifies a set of the instruction cache that includes an entry from which a block of instructions specified by the fetch virtual address was previously fetched;
• and
• a third sub-pipeline that includes a data RAM of the instruction cache configured to receive the predicted set index and a predicted way number that specifies a way of the entry from which the block of instructions was previously fetched:
• initiating, by the first, second and third sub-pipelines, respectively, in parallel:
• access of the TLB using the fetch virtual address to obtain a translation thereof into a fetch physical address that includes a tag;
• access of the tag RAM using the predicted set index to read a set of tags;
• and
• access of the data RAM using the predicted set index and the predicted way number to fetch the block of instructions.

A non-transitory computer-readable medium having instructions stored thereon that are capable of causing or configuring an instruction fetch pipeline comprising:

• a first sub-pipeline that includes a translation lookaside buffer (TLB) configured to receive a fetch virtual address;
• a second sub-pipeline that includes a tag random access memory (RAM) of a physically-indexed physically-tagged set associative instruction cache configured to receive a predicted set index, wherein the predicted set index specifies a set of the instruction cache that includes an entry from which a block of instructions specified by the fetch virtual address was previously fetched;
• and
• a third sub-pipeline that includes a data RAM of the instruction cache configured to receive the predicted set index and a predicted way number that specifies a way of the entry from which the block of instructions was previously fetched;
• wherein the first, second and third sub-pipelines are configured to respectively initiate in parallel:
• access of the TLB using the fetch virtual address to obtain a translation thereof into a fetch physical address that includes a tag;
• access of the tag RAM using the predicted set index to read a set of tags;
• and
• access of the data RAM using the predicted set index and the predicted way number to fetch the block of instructions.