Quantum well structure, chip processing method, chip, and laser
AssigneePhograin Technology (Shenzhen) Co., Ltd.
InventorsYanwei YANG, Hongliang LIU, Yan ZOU
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Abstract
A quantum well structure, a method for processing a chip, and a chip are provided. The quantum well structure includes an indium aluminum arsenide (InAlAs) quantum well layer and an indium aluminum gallium arsenide (InAlGaAs) quantum well layer. The InAlAs quantum well layer is implemented as multiple InAlAs quantum well layers. The thickness of the InAlGaAs quantum well layer is the same as the thickness of the InAlAs quantum well layer. The InAlGaAs quantum well layer is disposed between two adjacent InAlAs quantum well layers. The thickness of the InAlAs quantum well layer ranges from 0.4 nm to 0.6 nm. The number of the multiple InAlAs quantum well layers ranges from 3 to 17.
Claims20
A quantum well structure for a distributed feedback (DFB) laser chip, comprising:
- a plurality of indium aluminum arsenide (InAlAs) quantum well layers;
- and
- a plurality of indium aluminum gallium arsenide (InAlGaAs) quantum well layers, wherein a thickness of each of the plurality of InAlGaAs quantum well layers is the same as a thickness of each of the plurality of InAlAs quantum well layers, and one InAlGaAs quantum well layer is disposed between two adjacent InAlAs quantum well layers, wherein
- the thickness of each of the plurality of InAlAs quantum well layers ranges from 0.4 nm to 0.6 nm, and the number of the plurality of InAlAs quantum well layers ranges from 3 to 17.
A method for processing a chip, comprising:
- processing a chip-layer group on a substrate;
- removing part of the chip-layer group to form a waveguide region;
- processing a capping layer by growth;
- processing the capping layer at the waveguide region into a waveguide strip with an end surface facing the chip-layer group, and removing part of the waveguide strip attached to the chip-layer group to define a gap between the waveguide strip and the chip-layer group;
- and
- processing a waveguide cladding, and removing the waveguide cladding corresponding to the chip-layer group and the waveguide cladding corresponding to the gap.
A chip, comprising:
- a substrate having a chip region and a waveguide region;
- a chip-layer group disposed at the chip region of the substrate, wherein the chip-layer group comprises:
- a buffer layer with a thickness of 1 μm-1.5 μm on the substrate;
- a lower graded-buffer-layer with a thickness of 10 nm-100 nm;
- a quantum well structure with a thickness of 10 nm-30 nm, wherein the quantum well structure for a distributed feedback (DFB) laser chip comprises:
- a plurality of indium aluminum arsenide (InAlAs) quantum well layers;
- and
- a plurality of indium aluminum gallium arsenide (InAlGaAs) quantum well layers, wherein a thickness of each of the plurality of InAlGaAs quantum well layers is the same as a thickness of each of the plurality of InAlAs quantum well layers, and one InAlGaAs quantum well layer is disposed between two adjacent InAlAs quantum well layers, wherein
- the thickness of each of the plurality of InAlAs quantum well layers ranges from 0.4 nm to 0.6 nm, and the number of the plurality of InAlAs quantum well layers ranges from 3 to 17;
- an upper graded-buffer-layer with a thickness of 10 nm-100 nm;
- a grating layer;
- and
- a corrosion stop layer with a thickness of 10 nm-50 nm;
- a waveguide strip spaced apart from the chip-layer group and integrated at the waveguide region of the substrate, and configured to guide a light spot of laser light emitted to be substantially circular;
- and
- a waveguide cladding deposited on the waveguide strip.
Dependencies are inferred from the claim text.