Back to results
US 2023/0319985 A1Published application
Loading Pads for Impedance Management in Printed Circuit Board
AssigneeGoogle Inc.
InventorsLeesa Marie Noujeim, Hongyu Li
Life of this patent
Estimating the term…
Abstract
A printed circuit board (PCB) for three-dimensional (3D) packaging that may facilitate packaging multiple electronic components therein is provided. The PCB may include one or more loading pads formed around signal or ground vias to facilitate impedance control and reduce likelihood of signal distortion. The loading pads may be formed on a plane in a body of a dielectric layer configured to form the PCB.
Claims21
A printed circuit board (PCB), comprising:
- a first dielectric layer;
- a second dielectric layer formed adjacent to the first dielectric layer;
- a first plane defined by an interface between the first and the second dielectric layers;
- and
- at least one first loading pad formed on the first plane.
2 more elements
A printed circuit board (PCB), comprising:
- a stack of multiple dielectric layers;
- conductive features formed at an interface between each of the dielectric layers, wherein at least a first subset of the conductive features are formed on a conductive plane extending between adjacent dielectric layers, and wherein at least a second subset of the conductive features are formed on a plane defined by an interface between adjacent dielectric layers in direct contact;
- and
- a via formed through the one or more loading pads and the stack of multiple dielectric layers.
1 more element
A method for forming a PCB, comprising:
- forming a first dielectric layer;
- forming a first conductive layer on a surface of the first dielectric layer;
- removing at least a portion of the first conductive layer;
- and
- forming a second dielectric layer adjacent to at least a portion of the first dielectric layer.
2 more elements
Dependencies are inferred from the claim text.