Liquid crystal display device
AssigneeSharp Display Technology Corporation
InventorShogo SUZUKI
Life of this patent
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Abstract
A liquid crystal display device includes a display area having a plurality of first areas and a plurality of second areas arranged in a matrix in a row direction and a column direction, a plurality of first TFTs each located in one of the plurality of first areas, a plurality of pixel electrodes each located in one of the plurality of first areas, a plurality of transparent electrodes each located in one of the plurality of second areas, a plurality of gate bus lines extending in the row direction and being connected to the plurality of first TFTs, a plurality of source bus lines extending in the column direction and being connected to the plurality of first TFTs, and a plurality of dummy source bus lines each extending in the column direction and being connected to one of the plurality of gate bus lines.
Claims13
A liquid crystal display device comprising:
- a first substrate;
- a second substrate disposed facing the first substrate;
- a liquid crystal layer located between the first substrate and the second substrate, wherein a display area is formed so as to be located in an area in which the first substrate, the second substrate, and the liquid crystal layer are stacked and wherein the display area includes a plurality of first areas and a plurality of second areas arranged in a matrix in a row direction and a column direction;
- a plurality of first TFTs each located in one of the plurality of first areas of the first substrate;
- a plurality of pixel electrodes each located in one of the plurality of first areas of the first substrate and connected to one of the plurality of first TFTs;
- a plurality of transparent electrodes each located in one of the plurality of second areas of the first substrate;
- a counter electrode located on one of the first substrate and the second substrate so as to face the plurality of pixel electrodes and the plurality of transparent electrodes;
- a plurality of gate bus lines located on the first substrate, wherein the gate bus lines extend in the row direction and are connected to the plurality of first TFTs;
- a plurality of source bus lines located on the first substrate, wherein the source bus lines extend in the column direction and are connected to the plurality of first TFTs;
- and
- a plurality of dummy source bus lines located on the first substrate, wherein each of the dummy source bus lines extends in the column direction and is connected to one of the plurality of gate bus lines.
A liquid crystal display device comprising:
- a first substrate having a principal surface;
- a second substrate disposed facing the principal surface of the first substrate;
- a liquid crystal layer provided between the first substrate and the second substrate, wherein a display area is formed so as to be located in an area in which the first substrate, the second substrate, and the liquid crystal layer are stacked and wherein the display area includes a plurality of first areas and a plurality of second areas arranged in a matrix in a row direction and a column direction;
- a plurality of first TFTs each located in one of the plurality of first areas of the first substrate;
- a plurality of pixel electrodes each located in one of the plurality of first areas of the first substrate and connected to one of the plurality of first TFTs;
- a plurality of transparent electrodes each located in one of the plurality of second areas of the first substrate;
- a counter electrode located on the first substrate or the second substrate so as to face the plurality of pixel electrodes and the plurality of transparent electrodes;
- a plurality of gate bus lines located on the first substrate, wherein the gate bus lines extend in the row direction and are connected to the plurality of first TFTs;
- a plurality of source bus lines located on the first substrate, wherein the source bus lines extend in the column direction and are connected to the plurality of first TFTs;
- a plurality of dummy source bus lines located on the first substrate, wherein the dummy source bus lines extend in the column direction;
- and
- a gate driver connected to the plurality of gate bus lines, wherein the gate driver includes a plurality of second TFTs, and
- wherein the plurality of second TFTs are located in the second areas of the first substrate and are connected to at least a subset of the dummy source bus lines.
Dependencies are inferred from the claim text.