Interconnection substrate and method of manufacturing such a substrate
AssigneeSTMicroelectronics (Grenoble 2) SAS
InventorsFanny LAPORTE, Jerome LOPEZ
Life of this patent
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AssigneeSTMicroelectronics (Grenoble 2) SAS
InventorsFanny LAPORTE, Jerome LOPEZ
Estimating the term…
An interconnection substrate includes a thermomechanical support crossed by at least one electric interconnection hole. A first interconnection network is formed on a first surface of the thermomechanical support and a second interconnection network is formed on a second surface of the thermomechanical support. Each interconnection network includes and interconnection level formed by at least one metal track from which at least one metal via extends. The at least one metal track and the at least one metal via are embedded in an insulator layer so that the at least one metal via is flush with a surface of the insulator layer most distant from the thermomechanical support. At least one metal track protrudes from the insulator layer of the last interconnection level. The metal vias are configured to electrically couple together two adjacent levels and/or the last level with the at least one protruding metal track.
An interconnection substrate, comprising:
A method of manufacturing an interconnection substrate, comprising:
Dependencies are inferred from the claim text.