# US 2023/0275035 A1 · Semiconductor module, method for manufacturing the same, and power conversion device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2023/0275035 A1 - Document ID: US20230275035A1 - Status: Published application - Kind: A1 - Application number: 18/043,605 - Filed: 2021-09-14 - Published: 2023-08-31 - Earliest claimed: 2020-09-25 - Assignees: Mitsubishi Electric Corporation - Applicants: Mitsubishi Electric Corporation - Inventors: Hiroyuki YOSHIHARA; Yusuke ISHIYAMA; Yasuyuki SANDA; Kenichi HAYASHI - Web page: https://patentgrep.com/patent/US20230275035A1 ## CPC - H10W 40/778: {in encapsulations} - H10W 42/121: {protecting against mechanical damage (H10W76/00, H10W74/00 take precedence)} - H10W 40/037: {Assembling together parts thereof} - H10W 70/027: {Mechanical treatments, e.g. deforming, punching or cutting} - H10W 70/041: {Connecting or disconnecting interconnections to or from leadframes, e.g. connecting bond wires or bumps} - H10W 70/461: {specially adapted for cooling} - H10W 70/465: {Bumps or wires} - H10W 74/016: {using moulds} - H10W 74/111: {the semiconductor body being completely enclosed} - H10W 90/811: {Multiple chips on leadframes} - H02P 27/08: with pulse width modulation - H10W 40/226: {characterised by projecting parts, e.g. fins to increase surface area (leadframes for cooling H10W70/461)} - H10W 40/255: {having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates} - H10W 70/481: {for devices being provided for in groups H10D8/00 - H10D48/00} - H10W 74/00: Encapsulations, e.g. protective coatings - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H02P: CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS ## Abstract A semiconductor module includes: a fin base including a first surface and a second surface, the second surface being a surface opposite to the first surface; an insulating sheet arranged on the first surface; a plurality of frame patterns arranged on the first surface with the insulating sheet interposed therebetween; a semiconductor element arranged on at least one of the plurality of frame patterns; and a plurality of fins swaged onto the second surface so as to be spaced apart from each other in a first direction. ## Claims ### Claim 1 A semiconductor module comprising: a fin base including a first surface and a second surface, the second surface being a surface opposite to the first surface; an insulating sheet arranged on the first surface; a plurality of frame patterns arranged on the first surface with the insulating sheet interposed therebetween; a semiconductor element arranged on at least one of the plurality of frame patterns; and a plurality of fins swaged onto the second surface so as to be spaced apart from each other in a first direction, wherein the second surface is provided with a plurality of rising wall portions and a plurality of swaging portions, the plurality of rising wall portions extending along a second direction that intersects with the first direction and being spaced apart from each other in the first direction, each of the plurality of swaging portions extending along the second direction between adjacent two of the plurality of rising wall portions, at least one of the plurality of swaging portions includes a contact portion and a spaced-apart portion, the contact portion being in contact with a corresponding one of the plurality of fins, the spaced-apart portion being spaced apart from the corresponding one of the plurality of fins. the first direction is along a longitudinal direction of the fin base, the first surface includes a first end and a second end in the first direction the second end being an end opposite to the first end, the plurality of frame patterns include a first frame pattern and a second frame pattern extending along the first direction and being spaced apart from each other in the second direction on a central portion of the first surface, both ends of each of the first frame pattern and the second frame pattern are located outside a first fin of the plurality of fins located closest to the first end and a second fin of the plurality of fins located closest to the second end, and the spaced-apart portion is arranged at a position that overlaps with a space between the first frame pattern and the second frame pattern, wen viewed from a direction orthogonal to the first surface. ### Claim 2 (canceled) ### Claim 3 (depends on 1) The semiconductor module according to claim 1, wherein a first swaging portion and a second swaging portion of the plurality of swaging portions are adjacent to the first fin and the second fin, respectively, and include only the contact portion. ### Claim 4 (depends on 1) The semiconductor module according to claim 1, further comprising a wire, wherein the first frame pattern is divided into a first divided frame pattern and a second divided frame pattern in the first direction, and the first divided frame pattern and the second divided frame pattern are connected by the wire. ### Claim 5 (depends on 1) The semiconductor module according to claim 1, wherein the first frame pattern includes a first portion, a second portion, and a step portion connecting the first portion and the second portion and protruding toward an opposite side of the first surface. ### Claim 6 (depends on 1) The semiconductor module according to claim 1, wherein a first length is longer than a second length, the first length being a length of the contact portion in the second direction, the second length being a length of the spaced-apart portion in the second direction. ### Claim 7 (depends on 6) The semiconductor module according to claim 6, wherein a value obtained by dividing the second length by the first length is not less than 0.3 and not more than 0.6. ### Claim 8 (depends on 1) A power conversion device comprising: a main conversion circuit including the semiconductor module as recited in claim 1, to convert input electric power and output the input electric power; and a control circuit to output, to the main conversion circuit, a control signal for controlling the main conversion circuit. ### Claim 9 A method for manufacturing a semiconductor module, the method comprising: arranging a semiconductor element on at least one of a plurality of frame patterns; arranging the plurality of frame patterns on a first surface of a fin base with an insulating sheet interposed therebetween, the insulating sheet being arranged on the first surface; and swaging a plurality of fins on a second surface such that the plurality of fins are spaced apart from each other in a first direction, the second surface being a surface opposite to the first surface, wherein the second surface is provided with a plurality of rising wall portions and a plurality of swaging portions, the plurality of rising wall portions extending along a second direction that intersects with the first direction and being spaced apart from each other in the first direction, each of the plurality of swaging portions extending along the second direction between adjacent two of the plurality of rising wall portions, an upper surface of each of the plurality of swaging portions is provided with a groove extending along the second direction, the swaging a plurality of fins is performed by inserting a tip of a swaging blade into the groove and expanding a width of the groove along the first direction,- the tip includes a first portion having a width in the first direction larger than the width of the groove, and a second portion having a width in the first direction smaller than the width of the groove, the first direction is along a longitudinal direction of the fin base, the first surface includes a first end and a second end in the first direction, the second end being an opposite to the first end, the plurality of frame patterns include a first frame pattern and a second frame pattern extending along the first direction and being spaced apart from each other in the second direction on a central portion of the first surface, both ends of each of the first frame pattern and the second frame pattern are located outside a first fin of the plurality of fins located closest to the first end and a second fin of the plurality of fins located closest to the second end, and the spaced-apart portion is arranged at a position that overlaps with a space between the first frame pattern and the second frame pattern, when viewed from a direction orthogonal to the first surface.