Cross coupled capacitor analog in-memory processing device

A system for performing analog multiply-and-accumulate (MAC) operations, the system comprising:

• a first wordline to which a first analog input voltage is applied;
• a voltage supply line having a supply voltage (VDD);
• a first bitline;
• a clock signal line;
• a first current integrator op-amp connected to the first bitline and to the clock signal line;
• and
• a first cross coupling capacitor processing unit (C3PU) connected to the first wordline, wherein the first C3PU comprises:
• a first C3PU CMOS transistor comprising a first C3PU gate terminal, a first C3PU VDD terminal connected to the voltage supply line, and a first C3PU current output terminal connected to the first bitline;
• and
• a first C3PU capacitive unit comprising a first C3PU cross coupling capacitor and a first C3PU gate capacitor, wherein the first C3PU cross coupling capacitor is connected between the first wordline and the first C3PU gate terminal, and wherein the first C3PU gate capacitor is connected between the first C3PU gate terminal and ground,
• wherein the first C3PU CMOS transistor is configured to conduct a current that is proportional to voltage applied to the first C3PU gate terminal.