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US 2023/0229504 A1Published application
High dynamic range digitization technology for analog compute-in-memory and edge ai applications
AssigneeIntel Corporation
InventorsRenzhi Liu, Hechen Wang, Richard Dorrance, Deepak Dasalukunte, Brent Carlton
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Abstract
Systems, apparatuses and methods may provide for compute-in-memory (CiM) accelerator technology that includes a multiply-accumulate (MAC) computation stage, an analog amplifier stage coupled to an output of the MAC computation stage, and an analog to digital conversion (ADC) stage coupled to an output of the analog amplifier stage, wherein a gain setting of the analog amplifier stage modifies a quantization granularity of the ADC stage.
Claims25
A computing system comprising:
- a memory array;
- and
- an accelerator coupled to the memory array, the accelerator including:
- a multiply-accumulate (MAC) computation stage,
- an analog amplifier stage coupled to an output of the MAC computation stage, and
- an analog to digital conversion (ADC) stage coupled to an output of the analog amplifier stage, wherein a gain setting of the analog amplifier stage is to modify a quantization granularity of the ADC stage.
3 more elements
An accelerator comprising:
- a multiply-accumulate (MAC) computation stage;
- an analog amplifier stage coupled to an output of the MAC computation stage;
- and
- an analog to digital conversion (ADC) stage coupled to an output of the analog amplifier stage, wherein a gain setting of the analog amplifier stage is to modify a quantization granularity of the ADC stage.
1 more element
A method comprising:
- modifying, by a gain setting of an analog amplifier stage, a quantization granularity of an analog to digital conversion (ADC) stage, wherein the analog amplifier stage is coupled to an output of a multiply-accumulate (MAC) computation stage, and wherein the ADC stage is coupled to an output of the analog amplifier stage.
Dependencies are inferred from the claim text.