Bipolar junction device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsZi-Ang Su, Chih Chieh Yeh, Ming-Shuan Li
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Abstract
The present disclosure provides embodiments of bipolar junction transistor (BJT) structures. A BJT according to the present disclosure includes a first epitaxial feature disposed over a well region, a second epitaxial feature disposed over the well region, a vertical stack of channel members each extending lengthwise between the first epitaxial feature and the second epitaxial feature, a gate structure wrapping around each of the vertical stack of channel members, a first electrode coupled to the well region, an emitter electrode disposed over and coupled to the first epitaxial feature, and a second electrode disposed over and coupled to the second epitaxial feature.
Claims20
A bipolar junction transistor (BJT), comprising:
- a first epitaxial feature disposed over a well region;
- a second epitaxial feature disposed over the well region;
- a gate structure disposed between the first epitaxial feature and the second epitaxial feature;
- a first electrode coupled to the well region;
- an emitter electrode disposed over and coupled to the first epitaxial feature;
- and
- a second electrode disposed over and coupled to the second epitaxial feature,
- wherein the first epitaxial feature comprises silicon germanium and a p-type dopant,
- wherein the second epitaxial feature comprises silicon and an n-type dopant,
- wherein the well region comprises the n-type dopant,
- wherein the first electrode comprises a collector electrode, and
- wherein the second electrode comprises a base electrode.
A semiconductor device, comprising:
- a substrate comprising a well region;
- a first epitaxial feature disposed over the well region;
- a second epitaxial feature disposed over the well region;
- a plurality of nanostructures extending lengthwise between and in contact with the first epitaxial feature and the second epitaxial feature along a first direction;
- a gate structure wrapping around each of the plurality of nanostructures and extending lengthwise along a second direction perpendicular to the first direction;
- a first contact disposed over and in contact with the first epitaxial feature;
- a second contact disposed over and in contact with the second epitaxial feature;
- and
- a backside contact feature disposed below and coupled to the well region,
- wherein the first epitaxial feature comprises silicon germanium and a p-type dopant
- wherein the second epitaxial feature comprises silicon and an n-type dopant,
- wherein the well region comprises the n-type dopant.
A semiconductor device, comprising:
- a substrate comprising a well region;
- a first epitaxial feature disposed over the well region;
- a second epitaxial feature disposed over the well region;
- a plurality of nanostructures extending lengthwise between and in contact with the first epitaxial feature and the second epitaxial feature along a first direction;
- a first contact disposed over and in contact with the first epitaxial feature;
- a second contact disposed over and in contact with the second epitaxial feature;
- and
- a backside contact feature disposed below and coupled to the well region,
- wherein the plurality of nanostructures are stacked one over another and comprise silicon,
- wherein the first epitaxial feature comprises silicon germanium and a p-type dopant
- wherein the second epitaxial feature comprises silicon and an n-type dopant,
- wherein the well region comprises the n-type dopant.
Dependencies are inferred from the claim text.