Memory device capable of multi-level driving

Abstract

A memory device includes a gate electrode, a gate insulating layer formed on the gate electrode, a tunneling insulating layer stacked on the gate insulating layer, a channel layer stacked on the tunneling insulating layer, and a source electrode and a drain electrode formed on the channel layer to be spaced apart from each other. The tunneling insulating layer suppresses tunneling of charges from any one of the channel layer and the gate electrode by a voltage applied to each of the gate electrode and the drain electrode, and a density of tunneled charges is set according to the voltage applied to the drain electrode to output and store multiple current levels.

Dependencies are inferred from the claim text.