US 2023/0157033 A1 · SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREFOR

Abstract

Semiconductor structure and forming method therefor are provided. The semiconductor structure includes: substrate; first vertical transistor, including first source, first channel region located on the first source, first drain located on the first channel region, and first gate dielectric layer and first gate surrounding the first channel region; first storage structure located on the first drain; second vertical transistor, including the first source, second channel region located on the first source, second drain located on the second channel region, and second gate dielectric layer and second gate surrounding the second channel region; and second storage structure located on the second drain. The first source has bottom structure, first connection structure connecting the bottom structure, the first channel region and the second channel region, and second connection structure connecting the bottom structure and located on two sides of the first channel region and the second channel region.

Claims18

Dependent claims

A semiconductor structure, comprising:

a substrate;
a first vertical transistor, comprising:
a first source electrode located in the substrate, a first channel region located in the substrate and on the first source electrode, a first drain electrode located on the first channel region, and a first gate dielectric layer and a first gate electrode surrounding the first channel region;
a first storage structure located on the first drain electrode;
a second vertical transistor, comprising:
the first source electrode located in the substrate, a second channel region located in the substrate and on the first source electrode, a second drain electrode located on the second channel region, and a second gate dielectric layer and a second gate electrode surrounding the second channel region;
and
a second storage structure located on the second drain electrode;
wherein the first source electrode has a bottom structure, a first connection structure connecting the bottom structure, the first channel region and the second channel region, and a second connection structure connecting the bottom structure and located on two sides of the first channel region and the second channel region.

6 more elements

A method for forming a semiconductor structure, comprising:

providing a substrate;
forming a first vertical transistor and a second vertical transistor, wherein the first vertical transistor comprises a first source electrode located in the substrate, a first channel region located in the substrate and on the first source electrode, a first drain electrode located on the first channel region, and a first gate dielectric layer and a first gate electrode surrounding the first channel region;
the second vertical transistor comprises the first source electrode located in the substrate, a second channel region located in the substrate and on the first source electrode, a second drain electrode located on the second channel region, and a second gate dielectric layer and a second gate electrode surrounding the second channel region;
wherein the first source electrode has a bottom structure, a first connection structure connecting the bottom structure, the first channel region and the second channel region, and a second connection structure connecting the bottom structure and located on two sides of the first channel region and the second channel region;
and
forming a first storage structure on the first drain electrode and a second storage structure on the second drain electrode.

3 more elements

Dependencies are inferred from the claim text.

Semiconductor structure and forming method therefor

Life of this patent

Semiconductor structure and forming method therefor

Life of this patent

Abstract

Claims18