Three-dimensional memory device with word-line etch stop liners and method of making thereof
AssigneeSanDisk Technologies LLC
InventorsAdarsh RAJASHEKHAR, Raghuveer S. MAKALA, Fei ZHOU
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Abstract
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory stack structures vertically extending through the alternating stack, etch stop plates located in the staircase region, laterally and vertically spaced apart among one another, and overlying an end portion of a respective one of the electrically conductive layers, and contact via structures located in a staircase region, vertically extending through a respective one of the etch stop plates, and contacting a respective one of the electrically conductive layers.
Claims20
A three-dimensional memory device, comprising:
- an alternating stack of insulating layers and electrically conductive layers located over a substrate, wherein the alternating stack comprises a staircase region in which lateral extents of the electrically conductive layers decrease with a vertical distance from the substrate;
- memory stack structures vertically extending through the alternating stack, wherein each of the memory stack structures comprises a vertical semiconductor channel and a vertical stack of memory elements;
- etch stop plates located in the staircase region, and overlying an end portion of a respective one of the electrically conductive layers, wherein the etch stop plates comprise the material selected from tungsten nitride, tungsten carbide, tungsten carbonitride, aluminum oxide, or silicon carbide;
- and
- contact via structures located in the staircase region, vertically extending through a respective one of the etch stop plates, and contacting a respective one of the electrically conductive layers.
A method of forming a semiconductor structure, comprising:
- forming an alternating stack of insulating layers and sacrificial material layers over a substrate;
- forming stepped surfaces in a staircase region by patterning the alternating stack, wherein the alternating stack has variable lateral extents that decrease with a vertical distance from the substrate in the staircase region;
- forming semiconductor material plates over physically exposed horizontal surfaces of the sacrificial material layers in the staircase region employing a selective deposition process in which a semiconductor material selectively grows from the physically exposed horizontal surfaces of the sacrificial material layers;
- converting the semiconductor material plates into etch stop plates having a different material composition than the semiconductor material plates;
- forming memory stack structures through the alternating stack, wherein each of the memory stack structures comprises a vertical semiconductor channel and a vertical stack of memory elements;
- replacing at least the sacrificial material layers with conductive material layers;
- and
- forming contact via structures through a respective one of the etch stop plates and on a respective one of the electrically conductive layers.
A method of forming a semiconductor structure, comprising:
- forming an alternating stack of insulating layers and sacrificial material layers over a substrate;
- forming stepped surfaces in a staircase region by patterning the alternating stack;
- forming an etch stop layer that continuously extends over the stepped surfaces from a bottommost layer within the alternating stack to a topmost layer within the alternating stack;
- forming a retro-stepped dielectric material portion over the etch stop layer;
- forming memory stack structures through the alternating stack, wherein each of the memory stack structures comprises a vertical semiconductor channel and a vertical stack of memory elements;
- replacing at least the sacrificial material layers with electrically conductive layers;
- forming via cavities through the retro-stepped dielectric material portion, wherein a respective portion of the etch stop layer is physically exposed at a bottom of each of the via cavities;
- implanting ions through the via cavities into portions of the etch stop layer that underlie the via cavities such that the implanted portions of the etch stop layer become amorphous;
- removing the amorphous implanted portions of the etch stop layer;
- and
- forming contact via structures in the via cavities on a respective one of the electrically conductive layers.
Dependencies are inferred from the claim text.