Method and device for transmitting and receiving signals in wireless communication system
AssigneeLG Electronics Inc.
InventorsSeokmin SHIN, Seonwook KIM, Suckchel YANG
Life of this patent
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Abstract
In a method and a device for transmitting and receiving signals in a wireless communication system according to an embodiment of the present invention, N control resource set #0s (CORESET #0s) are received on the basis of first subcarrier spacing (SCS), and N synchronization signal blocks (SSBs) are received on the basis of second SCS. The SSBs are continuously located in the time domain. The CORESET #0s are located in a slot to which a most advanced SSB in the time domain from among the SSBs belongs, and are continuously located from symbol #0 within the slot.
Claims16
A method of transmitting and receiving a signal by a user equipment (UE) in a wireless communication system, the method comprising:
- receiving N control resource set #0s (CORESET #0s) based on a first subcarrier spacing (SCS);
- and
- receiving N synchronization signal blocks (SSBs) based on a second SCS,
- wherein the SSBs are continuously located in a time domain, and
- wherein the CORESET #0s are located in a slot including an earliest SSB in the time domain among the SSBs, and the CORESET #0s are continuously located from symbol #0 in the slot.
A user equipment (UE) configured to transmit and receive a signal in a wireless communication system, the UE comprising:
- at least one transceiver;
- at least one processor;
- and
- at least one memory operably connected to the at least one processor and configured to store instructions that, when executed, cause the at least one processor to perform operations comprising:
- receiving N control resource set #0s (CORESET #0s) based on a first subcarrier spacing (SCS);
- and
- receiving N synchronization signal blocks (SSBs) based on a second SCS,
- wherein the SSBs are continuously located in a time domain, and
- wherein the CORESET #0s are located in a slot including an earliest SSB in the time domain among the SSBs, and the CORESET #0s are continuously located from symbol #0 in the slot.
An apparatus for a user equipment (UE), the apparatus comprising:
- at least one processor;
- and
- at least one computer memory operably connected to the at least one processor and configured to, when executed, cause the at least one processor to perform operations comprising:
- receiving N control resource set #0s (CORESET #0s) based on a first subcarrier spacing (SCS);
- and
- receiving N synchronization signal blocks (SSBs) based on a second SCS,
- wherein the SSBs are continuously located in a time domain, and
- wherein the CORESET #0s are located in a slot including an earliest SSB in the time domain among the SSBs, and the CORESET #0s are continuously located from symbol #0 in the slot.
16-30. (canceled)
Dependencies are inferred from the claim text.